VPPREPROC(1)

💖 VPPREPROC(1) 💖

okay bestie, welcome to the manual page for vppreproc — the User Contributed Perl Documentation section 1 girlie 💅. It's pronounced "vee-pee-pre-proc" and it's about to preprocess your Verilog so good it'll give you main character energy. sit down, grab a strawberry drink 🍓, let's go.

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✨ NAME ✨

vppreproc — Preprocess Verilog code using verilog-perl 🦋

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✨ SYNOPSIS ✨

like, here's the vibe, the whole vibe:

vppreproc --help
vppreproc [verilog_options] [-o filename] [verilog_files.v...]

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✨ DESCRIPTION ✨

so vppreproc reads the Verilog files you hand it on the command line and outputs preprocessed output to standard out — OR to the filename you passed with -o. that's it, that's the whole job. iconic. ✨

💀 not me needing to tell you this but: vppreproc was literally named vppp until release 3.100, so if you're out here looking for vppp, bestie, this is the right replacement. the vppp name was beefing with another non-Verilog-related tool so it had to change. no cap.

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🌈 VERILOG ARGUMENTS 🌈

the following arguments are compatible with GCC, VCS and most Verilog programs. they ate, fr fr.

• +define+var+value =item -Dvar=value — Defines the given preprocessor symbol.
• -f file — Read the specified file, and act as if all text inside it was specified as command line parameters.
• -f file — Read the specified file, and act as if all text inside it was specified as command line parameters. Any relative paths are relative to the current directory.
• +incdir+dir =item -Idir — Add the directory to the list of directories that should be searched for include directories or libraries.
• +libext+ext+ext... — Specify the extensions that should be used for finding modules. If for example module x is referenced, look in x.ext.
• -y dir — Add the directory to the list of directories that should be searched for include directories or libraries.

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🎀 VPPREPROC ARGUMENTS 🎀

these ones are the girlies only section, the vppreproc exclusives 👑

• --help — Displays this message and program version and exits.
• --o file — Use the given filename for output instead of stdout.
• --dump-defines — Suppress normal output, and instead print a list of all defines existing at the end of processing the input file.
• --noblank — Removes empty lines from the output. Should be used with --noline, as if correct line numbers are needed, blank lines must be preserved for proper accounting by the program reading the output of vppreproc. (the way these two are a package deal… 🫶)
• --nocomment — Remove comments.
• --noline — Remove `line directives.
• -P — Same as --noline --noblank, similar to "GCC -P" behavior.
• --pedantic — Rigorously obey the Verilog spec. This disables the `error feature, and may disable other features that are not specified in the approved language reference manual. Defaults false.
• --simple — Requests simple output, an alias for --noline, --nocomment and --noblank.
• --synthesis — Define SYNTHESIS, and ignore text between "ambit", "pragma", "synopsys" or "synthesis" translate_off and translate_on meta comments.

⚠️ Note using metacomments is discouraged as they have led to silicon bugs (versus ifdef SYNTHESIS); see <https://www.veripool.org/papers/TenIPEdits_SNUGBos07_paper.pdf>. like, actual silicon bugs?? that's not a vibe, that's a horror movie 😭

• --version — Displays program version and exits.

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🌸 LANGUAGE EXTENSIONS 🌸

vppreproc supports the preprocessing constructs defined in the Verilog 2001 and SystemVerilog 2005 standards. fancy, right? 🧚

the following additional constructs may be added to your Verilog code:

• `__FILE__ — The __FILE__ define expands to the current filename as a string, like C++'s __FILE__. This was incorporated into to the 1800-2009 standard (but supported by Verilog-Perl since 2004!)
• `__LINE__ — The __LINE__ define expands to the current filename as a string, like C++'s __LINE__. This was incorporated into to the 1800-2009 standard (but supported by Verilog-Perl since 2004!)
• `error string — This will report an error when encountered, like C++'s #error.

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💜 DISTRIBUTION 💜

Verilog-Perl is part of the <https://www.veripool.org/> free Verilog EDA software tool suite. the latest version is available from CPAN and from <https://www.veripool.org/verilog-perl>.

Copyright 2000-2024 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.

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👑 AUTHORS 👑

Wilson Snyder <wsnyder@wsnyder.org>

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🦋 SEE ALSO 🦋

Verilog-Perl, Verilog::Getopt, Verilog::Preproc

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and that's the whole page bestie, slay 💅✨ — this was perl v5.42.0, dated 2025-07-25, from the VPPREPROC(1) girlies. go preprocess something gorgeous 🌈💖