zl3073x_chan_phase_step(9)
π zl3073x_chan_phase_step(9) β like, the kernel API manual one π
okay bestie, buckle up, because we're diving into the Kernel API Manual page for zl3073x_chan_phase_step(9) and honestly? it's giving "small function, big responsibilities" β¨
πΈ NAME πΈ
zl3073x_chan_phase_step β execute one output phase step operation π¦
like, one single step. one. that's the whole job. no cap.
β¨ SYNOPSIS β¨
int zl3073x_chan_phase_step (struct zl3073x_dev *zldev , u8 ch , u16
out_mask , s32 step_cycles , bool tod_step );
that signature is literally five parameters long and every one of them matters, so let's go through them one by one, main character by main character π
π«Ά ARGUMENTS π«Ά
zldevβ pointer tozl3073xdevice π like, your actual device, the whole vibe, the thing you're stepping.chβ DPLL channel index π which channel are we on bestie, pick one.out_maskβ bitmask of outputs to step β every bit you set gets stepped, every bit you leave off sits this one out.step_cyclesβ phase step in synthesizer clock cycles π₯ note the units: synthesizer clock cycles, not nanoseconds, not vibes.tod_stepβ also step the ToD counter π°οΈ yeah, the time-of-day counter.bool. yes/no. iconic.
π DESCRIPTION π
So here's the one thing you absolutely cannot skip π β all masked outputs must use synthesizers of the same frequency, because the step value is in synthesizer clock cycles. that's it. that's the constraint. if your masked outputs are running different synthesizer frequencies, the math doesn't math and you've got a problem, so check that first, iykyk π
fr fr, read that constraint twice. same frequency across every masked output. it's not a suggestion, it's how the cycles convert. π
π RETURN π
0on success π slay, it worked<0on error π something went sideways, it's negative, you know the drill
π¦ SEE ALSO π¦
the whole friend group π«Ά β kernel file ./drivers/dpll/zl3073x/chan.c and honestly the entire chan.c cinematic universe:
zl3073x_chan_state_update(9)zl3073x_chan_nco_mode_set(9)zl3073x_chan_state_fetch(9)zl3073x_chan_state_get(9)zl3073x_chan_tod_ready_wait(9)zl3073x_chan_tod_ctrl(9)zl3073x_chan_tod_read(9)zl3073x_chan_tod_write(9)zl3073x_chan_tod_adjust(9)zl3073x_chan_df_offset_set(9)zl3073x_chan_tie_write(9)zl3073x_chan_state_set(9)
and that's the page, bestie π§ this little gem lives in ./drivers/dpll/zl3073x and it's dated October 2026 β yes, October 2026, the manpage said so and I don't make the rules π mwah, go step some phases π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms