xe_mmio_read64_2x32(9)

okay bestie, welcome to the Kernel API Manual glow-up for xe_mmio_read64_2x32(9) 🫶✨ this one is all about reading a 64-bit register the safe way, no cap.

💖 NAME 💖

xe_mmio_read64_2x32 — read a 64-bit register as two 32-bit reads.

🌸 SYNOPSIS 🌸

u64 xe_mmio_read64_2x32 (struct xe_mmio *mmio , struct xe_reg reg );

🎀 ARGUMENTS 🎀

• mmio — MMIO target 💅
• reg — register to read value from ✨

🦋 DESCRIPTION 🦋

so here's the tea ☕: even though Intel GPUs have some 64-bit registers, the hardware officially only supports GTTMMADR register reads of 32 bits or smaller. and yes, even if a readq operation may return a reasonable value, that violation of the spec should not be relied upon — all 64-bit register reads should be performed as two 32-bit reads of the upper and lower dwords. periodt 💅

when you're reading registers that may be changing (think counters), a rollover of the lower dword between the two 32-bit reads can be problematic 😭. this function attempts to ensure the upper dword has stabilized before returning the 64-bit value. iconique behavior, honestly 👑✨

note that because this function may re-read the register multiple times while waiting for the value to stabilize, it should not be used to read any registers where read operations have side effects. seriously bestie, don't do it 🙈💀

Returns: the value of the 64-bit register. slay 🎀

🌈 SEE ALSO 🌈

Kernel file ./drivers/gpu/drm/xe/xe_mmio.c plus these iconique friends:

• xe_mmio_probe_tiles(9)
• xe_mmio_probe_early(9)
• xe_mmio_init(9)
• xe_mmio_wait32(9)
• xe_mmio_wait32_not(9)
• xe_mmio_init_vf_view(9)

xoxo, your Kernel API Manual bestie — source/version ./drivers/gpu/drm/xe, dated October 2026, page xe_mmio_read64_2x32(9) 💖🎀🦋