ufshcd_enable_intr(9)
π ufshcd_enable_intr β enable interrupts β¨
Okay so bestie, we're in the Kernel API Manual, section 9, and today's main character is ufshcd_enable_intr(9). She's a tiny little function with one job and honestly? She ate. Let's get into it π
πΈ NAME πΈ
ufshcd_enable_intr β enable interrupts. That's it, that's the whole vibe π
β¨ SYNOPSIS β¨
void ufshcd_enable_intr (struct ufs_hba *hba , u32 intrs );
No cap, that's the whole signature. Copy it exactly, bestie, don't get creative with the spacing π
π¦ ARGUMENTS π¦
hbaβ the per adapter instance. Like, the UFS host bus adapter you're working with. She's the main character of the whole driver, tbh πintrsβ the interrupt bits. These are the bits you're switching on, iykyk β‘
π₯ SEE ALSO π₯
First up, the kernel file where all this lives: ./drivers/ufs/core/ufshcd.c π
And okay, the friend group here is large, so buckle up. Literally everyone in the UFS core shows up to this party:
ufshcd_disable_intr(9)ufshcd_print_trs_all(9)ufshcd_print_pwr_info(9)ufshcd_wait_for_register(9)ufshcd_get_intr_mask(9)ufshcd_get_ufs_version(9)ufshcd_is_device_present(9)ufshcd_get_tr_ocs(9)ufshcd_utrl_clear(9)ufshcd_utmrl_clear(9)ufshcd_get_lists_status(9)ufshcd_get_req_rsp(9)ufshcd_is_exception_event(9)ufshcd_reset_intr_aggr(9)ufshcd_config_intr_aggr(9)ufshcd_disable_intr_aggr(9)ufshcd_enable_run_stop_reg(9)ufshcd_hba_start(9)ufshcd_is_hba_active(9)ufshcd_pm_qos_init(9)ufshcd_pm_qos_exit(9)ufshcd_pm_qos_update(9)ufshcd_set_clk_freq(9)ufshcd_scale_clks(9)ufshcd_is_devfreq_scaling_required(9)ufshcd_pause_command_processing(9)ufshcd_resume_command_processing(9)ufshcd_scale_gear(9)ufshcd_devfreq_scale(9)ufshcd_hold(9)ufshcd_send_command(9)ufshcd_copy_sense_data(9)ufshcd_copy_query_response(9)ufshcd_hba_capabilities(9)ufshcd_ready_for_uic_cmd(9)ufshcd_get_upmcrs(9)ufshcd_dispatch_uic_cmd(9)ufshcd_wait_for_uic_cmd(9)__ufshcd_send_uic_cmd(9)ufshcd_send_uic_cmd(9)ufshcd_sgl_to_prdt(9)ufshcd_map_sg(9)ufshcd_prepare_req_desc_hdr(9)ufshcd_prepare_utp_scsi_cmd_upiu(9)ufshcd_prepare_utp_query_req_upiu(9)ufshcd_compose_devman_upiu(9)ufshcd_comp_scsi_upiu(9)ufshcd_upiu_wlun_to_scsi_wlun(9)ufshcd_queuecommand(9)ufshcd_dev_cmd_completion(9)ufshcd_exec_dev_cmd(9)ufshcd_init_query(9)ufshcd_query_flag(9)ufshcd_query_attr(9)ufshcd_query_attr_retry(9)ufshcd_query_attr_qword(9)ufshcd_query_descriptor_retry(9)ufshcd_read_desc_param(9)struct uc_string_id(9)ufshcd_read_string_desc(9)ufshcd_read_unit_desc_param(9)ufshcd_memory_alloc(9)ufshcd_host_memory_configure(9)ufshcd_dme_link_startup(9)ufshcd_dme_reset(9)ufshcd_dme_enable(9)ufshcd_dme_set_attr(9)ufshcd_dme_get_attr(9)ufshcd_dme_rmw(9)ufshcd_uic_pwr_ctrl(9)ufshcd_uic_tx_eqtr(9)ufshcd_send_bsg_uic_cmd(9)ufshcd_uic_change_pwr_mode(9)ufshcd_get_max_pwr_mode(9)ufshcd_dme_change_power_mode(9)ufshcd_change_power_mode(9)ufshcd_config_pwr_mode(9)ufshcd_complete_dev_init(9)ufshcd_make_hba_operational(9)ufshcd_hba_stop(9)ufshcd_hba_execute_hce(9)ufshcd_link_startup(9)ufshcd_verify_dev_init(9)ufshcd_setup_links(9)ufshcd_lu_init(9)ufshcd_sdev_init(9)ufshcd_change_queue_depth(9)ufshcd_sdev_configure(9)ufshcd_sdev_destroy(9)ufshcd_scsi_cmd_status(9)ufshcd_transfer_rsp_status(9)ufshcd_uic_cmd_compl(9)ufshcd_compl_one_cqe(9)__ufshcd_transfer_req_compl(9)ufshcd_mcq_compl_pending_transfer(9)ufshcd_transfer_req_compl(9)ufshcd_disable_ee(9)ufshcd_enable_ee(9)ufshcd_enable_auto_bkops(9)ufshcd_disable_auto_bkops(9)ufshcd_force_reset_auto_bkops(9)ufshcd_bkops_ctrl(9)ufshcd_exception_event_handler(9)ufshcd_quirk_dl_nac_errors(9)ufshcd_abort_all(9)ufshcd_err_handler(9)ufshcd_update_uic_error(9)ufshcd_check_errors(9)ufshcd_tmc_handler(9)ufshcd_handle_mcq_cq_events(9)ufshcd_sl_intr(9)ufshcd_intr(9)ufshcd_issue_tm_cmd(9)ufshcd_issue_devman_upiu_cmd(9)ufshcd_exec_raw_upiu_cmd(9)ufshcd_advanced_rpmb_req_handler(9)ufshcd_eh_device_reset_handler(9)ufshcd_try_to_abort_task(9)ufshcd_abort(9)ufshcd_process_probe_result(9)ufshcd_host_reset_and_restore(9)ufshcd_reset_and_restore(9)ufshcd_eh_host_reset_handler(9)ufshcd_get_max_icc_level(9)ufshcd_find_max_sup_active_icc_level(9)ufshcd_scsi_add_wlus(9)ufshcd_create_device_id(9)ufshcd_quirk_tune_host_pa_tactivate(9)ufshcd_quirk_override_pa_h8time(9)ufshcd_add_lus(9)ufshcd_get_op_mode(9)ufshcd_probe_hba(9)ufshcd_async_scan(9)ufshcd_set_dev_pwr_mode(9)ufshcd_suspend(9)ufshcd_resume(9)ufshcd_system_suspend(9)ufshcd_system_resume(9)ufshcd_runtime_suspend(9)ufshcd_runtime_resume(9)ufshcd_remove(9)ufshcd_set_dma_mask(9)ufshcd_devres_release(9)ufshcd_alloc_host(9)ufshcd_init(9)
Like I said β everyone showed up. 145 entries and not a single one is skippable, so don't come for me about the list length ππ
That's the whole page, bestie! Now go forth and enable those interrupts with main character energy π«Ά
Source/version: ./drivers/ufs/core Β· Dated: October 2026 Β· Page: ufshcd_enable_intr(9) β mwah, love u, see u in the next manpage ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms