tegra_uart_wait_cycle_time(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

okay so bestie, this is the tegra_uart_wait_cycle_time(9) page from the Kernel API Manual, and the whole assignment is literally β€œwait for N UART clock periods.” πŸ’… no cap.

πŸ¦‹ SYNOPSIS πŸ¦‹

void tegra_uart_wait_cycle_time (struct tegra_uart_port *tup , unsigned
       int cycles );

πŸ’… ARGUMENTS πŸ’…

  • tup β€” the Tegra serial port data structure. your main-character struct, periodt. πŸ‘‘
  • cycles β€” number of clock periods to wait. literally the countdown, bestie. ⏳

🌸 DESCRIPTION 🌸

Tegra UARTs are clocked at 16X the baud/bit rate, and hence the UART clock speed is 16X the current baud rate. that’s the math vibe, and it ate. ✨

πŸ”₯ SEE ALSO πŸ”₯

  • Kernel file ./drivers/tty/serial/serial-tegra.c β€” struct tegra_uart_chip_data(9) 🫢

okay bye bestie πŸŽ€ this page lives in ./drivers/tty/serial, dated October 2026, and it’s giving tegra_uart_wait_cycle_time(9) energy. πŸ’–

πŸ“¦ where this page comes from