tegra_dc_state_setup_clock(9)
π tegra_dc_state_setup_clock(9) π
okay bestie so we're in the Kernel API Manual today and the main character of this whole page is tegra_dc_state_setup_clock β say it with me, it's giving very long function name energy but we're gonna get through it together π«Ά
β¨ NAME β¨
tegra_dc_state_setup_clock β check clock settings and store them in atomic state
like, it checks the clock settings first and then tucks them safely into the atomic state. two jobs, one function, she's booked and busy π
π SYNOPSIS π
int tegra_dc_state_setup_clock (struct tegra_dc *dc , struct
drm_crtc_state *crtc_state , struct clk *clk , unsigned long pclk ,
unsigned int div );
five arguments, no cap. she returns an int. let's meet the whole friend group πΈ
π¦ ARGUMENTS π¦
dcβ display controller. the whole vibe, the main character of the display world πcrtc_stateβ CRTC atomic state. this is where the clock settings get stored, bestie, it's her little locker πclkβ parent clock for display controller. the actual clock in question, the one getting checked β¨pclkβ pixel clock. yes her, the pixel clock, very important, very iconic πdivβ shift clock divider. the divider, shifting away, doing her thing π§
π RETURN π
0 on success, or a negative error-code on failure π
so like, 0 = slay, negative = not slay. check it, okay? don't just assume it worked because that's how you end up confused and sad π
β SEE ALSO β
- Kernel file
./drivers/gpu/drm/tegra/dc.cβ go read the source, it's literally right there, iykyk π
and that's the whole page bestie, you ate that ππ
with love from ./drivers/gpu/drm/tegra, dated October 2026 β that's the source/version and the date, and no i'm not copying the footer line, i'm mentioning it cutely, periodt ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms