STRUCT XILINX_DPDMA_HW_DESC(9)

💅 struct xilinx_dpdma_hw_desc — DPDMA hardware descriptor

okay so this is a page from the Kernel API Manual, and it's all about struct xilinx_dpdma_hw_desc — the DPDMA hardware descriptor. it's giving ✨hardware✨ so you know it's the real low-level stuff, bestie. no cap.

🦋 SYNOPSIS

struct xilinx_dpdma_hw_desc {
    u32 control;
    u32 desc_id;
    u32 xfer_size;
    u32 hsize_stride;
    u32 timestamp_lsb;
    u32 timestamp_msb;
    u32 addr_ext;
    u32 next_desc;
    u32 src_addr;
    u32 addr_ext_23;
    u32 addr_ext_45;
    u32 src_addr2;
    u32 src_addr3;
    u32 src_addr4;
    u32 src_addr5;
    u32 crc;
 };

like, that's the whole struct, laid out exactly how the hardware wants it 🎀

🌸 Members — the whole cast, one by one 👑

• control — the control configuration field. it's literally the little switchboard that tells the descriptor how to behave 💅
• desc_id — the descriptor ID. every descriptor's own little name tag, iykyk ✨
• xfer_size — transfer size. how much is actually moving, periodt 🫶
• hsize_stride — horizontal size and stride, packaged together like a bestie duo 🎀
• timestamp_lsb — the LSB of the time stamp. the low-key half of the timestamp 🦋
• timestamp_msb — the MSB of the time stamp. the highkey other half ⭐
• addr_ext — the upper 16 bit of a 48 bit address (specifically next_desc and src_addr). that's the top bits, holding the address together 🔥
• next_desc — next descriptor 32 bit address. literally the "and then?" pointer 🧚
• src_addr — payload source address (1st page, 32 LSB) 📍
• addr_ext_23 — payload source address (2nd and 3rd pages, 16 LSBs) 💖
• addr_ext_45 — payload source address (4th and 5th pages, 16 LSBs) 💜
• src_addr2 — payload source address (2nd page, 32 LSB) 🍓
• src_addr3 — payload source address (3rd page, 32 LSB) 🌈
• src_addr4 — payload source address (4th page, 32 LSB) 🌸
• src_addr5 — payload source address (5th page, 32 LSB) 🦋
• crc — descriptor CRC. the vibe check that makes sure nothing got corrupted 💀

ngl, five source address fields and a pile of address-extension fields sounds like a lot, but it's just how the hardware describes multi-page payloads — every single one of them earns its spot in the struct 🫶

🧚 SEE ALSO

the kernel file lives at ./drivers/dma/xilinx/xilinx_dpdma.c, and here's the full squad of related stuff, fr fr:

• struct xilinx_dpdma_sw_desc(9)
• struct xilinx_dpdma_tx_desc(9)
• struct xilinx_dpdma_chan(9)
• struct xilinx_dpdma_device(9)
• xilinx_dpdma_sw_desc_set_dma_addrs(9)
• xilinx_dpdma_chan_alloc_sw_desc(9)
• xilinx_dpdma_chan_free_sw_desc(9)
• xilinx_dpdma_chan_dump_tx_desc(9)
• xilinx_dpdma_chan_alloc_tx_desc(9)
• xilinx_dpdma_chan_free_tx_desc(9)
• xilinx_dpdma_chan_prep_cyclic(9)
• xilinx_dpdma_chan_prep_interleaved_dma(9)
• xilinx_dpdma_chan_enable(9)
• xilinx_dpdma_chan_disable(9)
• xilinx_dpdma_chan_pause(9)
• xilinx_dpdma_chan_unpause(9)
• xilinx_dpdma_chan_queue_transfer(9)
• xilinx_dpdma_chan_ostand(9)
• xilinx_dpdma_chan_notify_no_ostand(9)
• xilinx_dpdma_chan_wait_no_ostand(9)
• xilinx_dpdma_chan_poll_no_ostand(9)
• xilinx_dpdma_chan_stop(9)
• xilinx_dpdma_chan_done_irq(9)
• xilinx_dpdma_chan_vsync_irq(9)
• xilinx_dpdma_chan_err(9)
• xilinx_dpdma_chan_handle_err(9)
• xilinx_dpdma_alloc_chan_resources(9)
• xilinx_dpdma_free_chan_resources(9)
• xilinx_dpdma_terminate_all(9)
• xilinx_dpdma_synchronize(9)
• xilinx_dpdma_err(9)
• xilinx_dpdma_handle_err_irq(9)
• xilinx_dpdma_enable_irq(9)
• xilinx_dpdma_disable_irq(9)
• xilinx_dpdma_chan_err_task(9)

lowkey the *_ostand ones sound like they're about to drop a mixtape, but they're genuinely part of the DPDMA API. go read them, bestie 🫶

and that's the page!! sign-off time: this one's from ./drivers/dma/xilinx, in the Kernel API Manual, dated October 2026 — mwah, slay, go read your structs 💅✨👑