STRUCT XILINX_DPDMA_CHAN(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct xilinx_dpdma_chan(9) β€” like, the DPDMA channel struct bestie

okay so real talk, this is from the Kernel API Manual and it's literally the definition of struct xilinx_dpdma_chan, aka the DPDMA channel. one struct, so many little fields, all of them iconic in their own way ✨


πŸŽ€ NAME πŸŽ€

struct xilinx_dpdma_chan β€” DPDMA channel. that's the whole vibe. it's a channel. it does DPDMA. slay.


🌸 SYNOPSIS 🌸

struct xilinx_dpdma_chan {
    struct virt_dma_chan vchan;
    void __iomem *reg;
    unsigned int id;
    wait_queue_head_t wait_to_stop;
    bool running;
    bool first_frame;
    bool video_group;
    spinlock_t lock;
    struct dma_pool *desc_pool;
    struct tasklet_struct err_task;
    struct {
      struct xilinx_dpdma_tx_desc *pending;
      struct xilinx_dpdma_tx_desc *active;
    } desc;
    struct xilinx_dpdma_device *xdev;
 };

no cap, that's the whole thing verbatim, every field, every brace. do not touch 🫢


πŸ¦‹ Members πŸ¦‹

okay bestie, field-by-field tour, let's go:

  • vchan β€” the virtual DMA channel. it's giving "the actual channel energy" πŸ’«
  • reg β€” register base address. where the hardware lives, fr fr.
  • id β€” the channel ID. every channel needs to know its own name πŸŽ€
  • wait_to_stop β€” a queue you wait on for outstanding transactions before stopping. like, hold up, let the pending stuff finish first 😭
  • running β€” true if the channel is running. simple as that, king πŸ‘‘
  • first_frame β€” flag for the first frame of the stream. the debut frame, main character energy ⭐
  • video_group β€” flag if multi-channel operation is needed for the video channels. squad goals 🌈
  • lock β€” lock to access struct xilinx_dpdma_chan. ⚠️ and this is the important bit: it must be taken before vchan.lock, if both are to be held. lock order is not a suggestion, bestie, it's the law πŸ’€
  • desc_pool β€” the descriptor allocation pool. it's where the descriptors hang out πŸ“
  • err_task β€” error IRQ bottom half handler. the cleanup crew for when things go wrong πŸ™ˆ
  • desc β€” references to descriptors being processed. the whole processing pipeline lives here ✨
    • desc.pending β€” descriptor scheduled to the hardware, pending execution. waiting its turn, lowkey patient 🧚
    • desc.active β€” descriptor being executed by the hardware right now. currently booked and busy πŸ”₯
  • xdev β€” the DPDMA device. the parent, the icon, the whole reason this channel exists πŸ’œ

πŸ’– SEE ALSO πŸ’–

go read these next, iykyk:


and that's the whole page bestie, mwah πŸ’‹ this little masterpiece lives at ./drivers/dma/xilinx and it's dated October 2026 β€” so like, future vibes only. periodt. πŸ¦‹πŸ’…

πŸ“¦ where this page comes from