STRUCT XILINX_DPDMA_CHAN(9)
π struct xilinx_dpdma_chan(9) β like, the DPDMA channel struct bestie
okay so real talk, this is from the Kernel API Manual and it's literally the definition of struct xilinx_dpdma_chan, aka the DPDMA channel. one struct, so many little fields, all of them iconic in their own way β¨
π NAME π
struct xilinx_dpdma_chan β DPDMA channel. that's the whole vibe. it's a channel. it does DPDMA. slay.
πΈ SYNOPSIS πΈ
struct xilinx_dpdma_chan {
struct virt_dma_chan vchan;
void __iomem *reg;
unsigned int id;
wait_queue_head_t wait_to_stop;
bool running;
bool first_frame;
bool video_group;
spinlock_t lock;
struct dma_pool *desc_pool;
struct tasklet_struct err_task;
struct {
struct xilinx_dpdma_tx_desc *pending;
struct xilinx_dpdma_tx_desc *active;
} desc;
struct xilinx_dpdma_device *xdev;
};
no cap, that's the whole thing verbatim, every field, every brace. do not touch π«Ά
π¦ Members π¦
okay bestie, field-by-field tour, let's go:
vchanβ the virtual DMA channel. it's giving "the actual channel energy" π«regβ register base address. where the hardware lives, fr fr.idβ the channel ID. every channel needs to know its own name πwait_to_stopβ a queue you wait on for outstanding transactions before stopping. like, hold up, let the pending stuff finish first πrunningβtrueif the channel is running. simple as that, king πfirst_frameβ flag for the first frame of the stream. the debut frame, main character energy βvideo_groupβ flag if multi-channel operation is needed for the video channels. squad goals πlockβ lock to accessstruct xilinx_dpdma_chan. β οΈ and this is the important bit: it must be taken beforevchan.lock, if both are to be held. lock order is not a suggestion, bestie, it's the law πdesc_poolβ the descriptor allocation pool. it's where the descriptors hang out πerr_taskβ error IRQ bottom half handler. the cleanup crew for when things go wrong πdescβ references to descriptors being processed. the whole processing pipeline lives here β¨desc.pendingβ descriptor scheduled to the hardware, pending execution. waiting its turn, lowkey patient π§desc.activeβ descriptor being executed by the hardware right now. currently booked and busy π₯
xdevβ the DPDMA device. the parent, the icon, the whole reason this channel exists π
π SEE ALSO π
go read these next, iykyk:
- Kernel file
./drivers/dma/xilinx/xilinx_dpdma.c struct xilinx_dpdma_hw_desc(9)struct xilinx_dpdma_sw_desc(9)struct xilinx_dpdma_tx_desc(9)struct xilinx_dpdma_device(9)xilinx_dpdma_sw_desc_set_dma_addrs(9)xilinx_dpdma_chan_alloc_sw_desc(9)xilinx_dpdma_chan_free_sw_desc(9)xilinx_dpdma_chan_dump_tx_desc(9)xilinx_dpdma_chan_alloc_tx_desc(9)xilinx_dpdma_chan_free_tx_desc(9)xilinx_dpdma_chan_prep_cyclic(9)xilinx_dpdma_chan_prep_interleaved_dma(9)xilinx_dpdma_chan_enable(9)xilinx_dpdma_chan_disable(9)xilinx_dpdma_chan_pause(9)xilinx_dpdma_chan_unpause(9)xilinx_dpdma_chan_queue_transfer(9)xilinx_dpdma_chan_ostand(9)xilinx_dpdma_chan_notify_no_ostand(9)xilinx_dpdma_chan_wait_no_ostand(9)xilinx_dpdma_chan_poll_no_ostand(9)xilinx_dpdma_chan_stop(9)xilinx_dpdma_chan_done_irq(9)xilinx_dpdma_chan_vsync_irq(9)xilinx_dpdma_chan_err(9)xilinx_dpdma_chan_handle_err(9)xilinx_dpdma_alloc_chan_resources(9)xilinx_dpdma_free_chan_resources(9)xilinx_dpdma_terminate_all(9)xilinx_dpdma_synchronize(9)xilinx_dpdma_err(9)xilinx_dpdma_handle_err_irq(9)xilinx_dpdma_enable_irq(9)xilinx_dpdma_disable_irq(9)xilinx_dpdma_chan_err_task(9)
and that's the whole page bestie, mwah π this little masterpiece lives at ./drivers/dma/xilinx and it's dated October 2026 β so like, future vibes only. periodt. π¦π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms