s5p_hash_write_ctrl(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

okay bestie πŸ’– welcome to s5p_hash_write_ctrl(9) from the Kernel API Manual β€” this is the little prep queen that gets the HASH block in SecSS ready for processing. she’s not out here starting DMA (more on that later πŸ‘€), she’s just doing the setup so the hardware can slay. 🫢

✨ NAME ✨

s5p_hash_write_ctrl β€” prepare HASH block in SecSS for processing. that’s the whole assignment, bestie, and she ate. πŸ’…

πŸ“œ SYNOPSIS πŸ“œ

void s5p_hash_write_ctrl (struct s5p_aes_dev *dd , size_t length , bool final );

πŸŽ€ ARGUMENTS πŸŽ€

  • dd β€” secss device. that’s the hardware bestie we’re working with.
  • length β€” length for request. yes, the actual size of the request, periodt.
  • final β€” true if final op. if this is the final operation, she’s true; otherwise not. πŸ’…

πŸ¦‹ DESCRIPTION πŸ¦‹

okay so here’s the tea β˜•: this function prepares the SSS HASH block for processing bytes in DMA mode.

if it’s called after previous updates, it fills up IV words. got it? good.

for final, it calculates and sets lengths for HASH so SecSS can finalize the hash. she’s tying the bow πŸŽ€.

for partial, it sets the SSS HASH length as 2^63 so it will never be reached, and sets prelow and prehigh to zero. dramatic? yes. effective? also yes. πŸ’€

big vibe check: this function does not start DMA transfer. not even a little. nope. πŸ™ˆ

🌈 SEE ALSO 🌈

the whole squad, no skips, no cap:

mwah πŸ’‹ β€” source/version: ./drivers/crypto; date: October 2026. this page is s5p_hash_write_ctrl(9), and she’s iconic. periodt. 🫢✨

πŸ“¦ where this page comes from