stmmac_tso_xmit(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… stmmac_tso_xmit(9) β€” the Kernel API Manual, bestie edition ✨

okay so real quick housekeeping: this whole page lives in the Kernel API Manual section 9, and the star of the show is stmmac_tso_xmit. buckle up πŸŽ€


🌸 NAME 🌸

stmmac_tso_xmit β€” literally the Tx entry point of the driver for oversized frames (aka TSO). that's it, that's the vibe πŸ’–


✨ SYNOPSIS ✨

netdev_tx_t stmmac_tso_xmit (struct sk_buff *skb , struct net_device *dev );

πŸ¦‹ ARGUMENTS πŸ¦‹

  • skb β€” the socket buffer πŸ‘‘
  • dev β€” device pointer 🫢

πŸ’œ DESCRIPTION πŸ’œ

so this is the transmit function that gets called on TSO frames (support is available on GMAC4 and newer chips, no cap πŸ’…). the diagram below shows the ring programming when we're dealing with TSO frames β€” it's giving very much "words of affirmation" but for descriptors:

First Descriptor --------
| DES0 |---> buffer1 = L2/L3/L4 header
| DES1 |---> can be used as buffer2 for TCP Payload if the DMA AXI address
|      |     width is 32-bit, but we never use it.
|      |     Also can be used as the most-significant 8-bits or 16-bits of
|      |     buffer1 address pointer if the DMA AXI address width is 40-bit
|      |     or 48-bit, and we always use it.
| DES2 |---> buffer1 len
| DES3 |---> must set TSE, TCP hdr len-> [22:19]. TCP payload len [17:0]
--------
--------
| DES0 |---> buffer1 = TCP Payload (can continue on next descr...)
| DES1 |---> same as the First Descriptor
| DES2 |---> buffer1 len
| DES3 |
--------
| ...
--------
| DES0 |---> buffer1 = Split TCP Payload
| DES1 |---> same as the First Descriptor
| DES2 |---> buffer1 len
| DES3 |
--------

let me walk you through it, bestie 🌈

πŸŽ€ the First Descriptor

  • DES0 points at buffer1 = L2/L3/L4 header β€” the header girlies go here first.
  • DES1 is the flexible one, and it's a whole personality trait:
    • it can be used as buffer2 for the TCP Payload if the DMA AXI address width is 32-bit β€” but we literally never use it that way. not once. πŸ™ˆ
    • it also can be used as the most-significant 8-bits or 16-bits of the buffer1 address pointer if the DMA AXI address width is 40-bit or 48-bit β€” and this one? we always use it. main character energy ⭐
  • DES2 β†’ buffer1 len
  • DES3 β†’ you must set TSE, plus TCP hdr len in bits [22:19] and TCP payload len in bits [17:0]. get those bit ranges right or it's over for you πŸ’€

🧚 the payload descriptors

  • DES0 β†’ buffer1 = TCP Payload (and yes, it can continue on the next descr...)
  • DES1 β†’ same as the First Descriptor
  • DES2 β†’ buffer1 len
  • DES3 β†’ (nothing called out here!)

then it keeps going with | ... | and you hit the last shape:

  • DES0 β†’ buffer1 = Split TCP Payload
  • DES1 β†’ same as the First Descriptor
  • DES2 β†’ buffer1 len
  • DES3 β†’ (again, nothing called out)
lowkey important: mss is fixed when you enable tso, so you're doing all this w/o programming the TDES3 ctx field. write that down πŸ“

πŸ”₯ SEE ALSO πŸ”₯

the kernel file this lives in, bestie: ./drivers/net/ethernet/stmicro/stmmac/stmmac_main.c πŸ“

and honestly the whole extended friend group, in the exact order the page gives them:

stmmac_set_clk_tx_rate(9), stmmac_axi_blen_to_mask(9), stmmac_verify_args(9), stmmac_disable_all_queues(9), stmmac_enable_all_queues(9), stmmac_rx_dirty(9), stmmac_try_to_start_sw_lpi(9), stmmac_stop_sw_lpi(9), stmmac_eee_ctrl_timer(9), stmmac_hwtstamp_set(9), stmmac_hwtstamp_get(9), stmmac_init_tstamp_counter(9), stmmac_init_timestamping(9), stmmac_mac_flow_ctrl(9), stmmac_check_pcs_mode(9), stmmac_init_phy(9), stmmac_clear_rx_descriptors(9), stmmac_clear_tx_descriptors(9), stmmac_clear_descriptors(9), stmmac_init_rx_buffers(9), stmmac_free_rx_buffer(9), stmmac_free_tx_buffer(9), dma_free_rx_skbufs(9), dma_free_rx_xskbufs(9), __init_dma_rx_desc_rings(9), __init_dma_tx_desc_rings(9), init_dma_desc_rings(9), dma_free_tx_skbufs(9), stmmac_free_tx_skbufs(9), __free_dma_rx_desc_resources(9), __free_dma_tx_desc_resources(9), __alloc_dma_rx_desc_resources(9), __alloc_dma_tx_desc_resources(9), alloc_dma_desc_resources(9), free_dma_desc_resources(9), stmmac_mac_enable_rx_queues(9), stmmac_start_rx_dma(9), stmmac_start_tx_dma(9), stmmac_stop_rx_dma(9), stmmac_stop_tx_dma(9), stmmac_start_all_dma(9), stmmac_stop_all_dma(9), stmmac_dma_operation_mode(9), stmmac_tx_clean(9), stmmac_tx_err(9), stmmac_set_dma_operation_mode(9), stmmac_dma_interrupt(9), stmmac_mmc_setup(9), stmmac_get_hw_features(9), stmmac_check_ether_addr(9), stmmac_init_dma_engine(9), stmmac_tx_timer(9), stmmac_init_coalesce(9), stmmac_set_tx_queue_weight(9), stmmac_configure_cbs(9), stmmac_rx_queue_dma_chan_map(9), stmmac_mac_config_rx_queues_prio(9), stmmac_mac_config_tx_queues_prio(9), stmmac_mac_config_rx_queues_routing(9), stmmac_mtl_configuration(9), stmmac_hw_setup(9), stmmac_setup_dma_desc(9), __stmmac_open(9), stmmac_release(9), stmmac_tso_allocator(9), stmmac_has_ip_ethertype(9), stmmac_xmit(9), stmmac_rx_refill(9), stmmac_rx(9), stmmac_tx_timeout(9), stmmac_set_rx_mode(9), stmmac_change_mtu(9), stmmac_interrupt(9), stmmac_ioctl(9), stmmac_hw_init(9), stmmac_dvr_probe(9), stmmac_dvr_remove(9), stmmac_suspend(9), stmmac_reset_queues_param(9), stmmac_resume(9)


okay that's the whole page, you ate that 🫢 and for the credits portion of the group chat: the source path is ./drivers/net/ethernet/stmicro..., this edition is dated October 2026, and the whole thing is filed under stmmac_tso_xmit(9). slay, go program some descriptors πŸ’…βœ¨πŸŒΈ

πŸ“¦ where this page comes from