sis_set_fifo(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… sis_set_fifo(9) πŸ’…

hey bestie, welcome to sis_set_fifo(9) from the Kernel API Manual! she’s here to set the RWP fifo bits for this device, and honestly? important. πŸ’–


🌸 NAME 🌸

sis_set_fifo β€” sets the RWP fifo bits for this device, periodt. ✨

✨ SYNOPSIS ✨

the signature is literally:

void sis_set_fifo (struct ata_port *ap , struct ata_device *adev );

πŸŽ€ ARGUMENTS πŸŽ€

  • ap β€” the Port, bestie. πŸ’…
  • adev β€” the Device, no cap. 🫢

πŸ¦‹ DESCRIPTION πŸ¦‹

okay so here’s the tea: SIS chipsets implement prefetch/postwrite bits for each device on both channels. πŸ‘‘

this functionality is not ATAPI compatible, and it must be configured according to the class of device present. that’s not a vibe you can skip, okay? 😭

🚨 caveat check: not ATAPI compatible β€” configure it according to the class of device present. fr fr.

🌈 SEE ALSO 🌈

go peek at the Kernel file ./drivers/ata/pata_sis.c and these iconic friends:


xoxo bestie πŸ’– β€” source/version: ./drivers/ata, date: October 2026 ✨

πŸ“¦ where this page comes from