si_dma_vm_set_pte_pde(9)

💖 NAME 💖

okay so bestie, welcome to the Kernel API Manual page for si_dma_vm_set_pte_pde(9) 💅 this one is literally here to update the page tables using sDMA. the way that a low-level page-table update can have main character energy? iykyk. no cap.

✨ SYNOPSIS ✨

here's the exact signature, fr fr — don't let the line break scare you:

       void si_dma_vm_set_pte_pde (struct amdgpu_ib *ib , uint64_t pe ,
       uint64_t addr , unsigned count , uint32_t incr , uint64_t flags );

it returns void, so it's giving "do the thing, hand back nothing" 😌.

🎀 ARGUMENTS 🎀

okay bestie, the whole cast of parameters:

• ib — indirect buffer to fill with commands 🫶
• pe — addr of the page entry
• addr — dst addr to write into pe
• count — number of page entries to update
• incr — increase next addr by incr bytes
• flags — access flags

🔥 DESCRIPTION 🔥

Update the page tables using sDMA (CIK). that's the whole description, and honestly? short, iconic, periodt. the (CIK) stays, bestie — it's part of the lore ✨.

🌈 SEE ALSO 🌈

if you wanna keep reading / cross-reference, the Kernel file is ./drivers/gpu/drm/amd/amdgpu/si_dma.c, and these besties are all in the SEE ALSO clique:

• si_dma_ring_get_rptr(9)
• si_dma_ring_get_wptr(9)
• si_dma_ring_emit_fence(9)
• si_dma_ring_test_ring(9)
• si_dma_ring_test_ib(9)
• si_dma_vm_copy_pte(9)
• si_dma_vm_write_pte(9)
• si_dma_ring_pad_ib(9)
• si_dma_ring_emit_pipeline_sync(9)
• si_dma_ring_emit_vm_flush(9)
• si_dma_emit_copy_buffer(9)
• si_dma_emit_fill_buffer(9)

made with 💖 in the ./drivers/gpu/drm/amd/amdgpu source tree · dated October 2026 · from the Kernel API Manual — k byeee 🫶💅