sdma_v3_0_enable(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ sdma_v3_0_enable(9) ✨

okay so bestie, welcome to the Kernel API Manual πŸ’… this lil page is literally all about sdma_v3_0_enable, and we're gonna get you comfy with it, no cap.


🌸 NAME 🌸

sdma_v3_0_enable β€” stop the async dma engines πŸ›‘

(yes that's what the NAME line says, and yes we are quoting it exactly, don't come for me πŸ™ˆ the function is called enable but the NAME line says stop β€” that's the icon behavior, we don't question the icon)


πŸ¦‹ SYNOPSIS πŸ¦‹

void sdma_v3_0_enable (struct amdgpu_device *adev , bool enable );

that's it. that's the whole signature. short king πŸ‘‘


πŸŽ€ ARGUMENTS πŸŽ€

  • adev β€” an amdgpu_device pointer, aka the whole vibe of the GPU device you're working with 🫢
  • enable β€” a bool that says whether we're enabling or disabling the DMA MEs, so basically the on/off switch of the whole situation ⚑

πŸ’– DESCRIPTION πŸ’–

so what does it actually do? it halts or unhalts the async dma engines (VI) ✨ that's the whole thing. halt = stop, unhalt = go again, and it's giving very much toggle energy πŸ”₯

ngl it's a tiny one β€” but it's a real one, and the DMA MEs are literally depending on it 😭

πŸ‘‘ SEE ALSO πŸ‘‘

bestie you HAVE to check out the rest of the family, they're all in the kernel file ./drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c and honestly the whole squad is iconic:

sdma_v3_0_init_microcode(9), sdma_v3_0_ring_get_rptr(9), sdma_v3_0_ring_get_wptr(9), sdma_v3_0_ring_set_wptr(9), sdma_v3_0_ring_emit_ib(9), sdma_v3_0_ring_emit_hdp_flush(9), sdma_v3_0_ring_emit_fence(9), sdma_v3_0_gfx_stop(9), sdma_v3_0_rlc_stop(9), sdma_v3_0_ctx_switch_enable(9), sdma_v3_0_gfx_resume(9), sdma_v3_0_rlc_resume(9), sdma_v3_0_start(9), sdma_v3_0_ring_test_ring(9), sdma_v3_0_ring_test_ib(9), sdma_v3_0_vm_copy_pte(9), sdma_v3_0_vm_write_pte(9), sdma_v3_0_vm_set_pte_pde(9), sdma_v3_0_ring_pad_ib(9), sdma_v3_0_ring_emit_pipeline_sync(9), sdma_v3_0_ring_emit_vm_flush(9), sdma_v3_0_emit_copy_buffer(9), sdma_v3_0_emit_fill_buffer(9)

go read them. all of them. i'll wait πŸ’…


and that's the page!! this little beauty lives in ./drivers/gpu/drm/amd/amdgpu, and it's dated October 2026 β€” so mark your calendar bestie πŸ—“οΈπŸ’– k bye, ily, go halt some async dma engines (or don't!) πŸŒˆπŸŽ€

πŸ“¦ where this page comes from