sdhci_versal...lk_set_phase(9)

🌸 NAME 🌸

sdhci_versal_sdcardclk_set_phase — okay so this is the one that sets the SD Output Clock Tap Delays, bestie 💅

This page lives in the Kernel API Manual, and honestly? It's giving "small function, big responsibilities" ✨

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🎀 SYNOPSIS 🎀

int sdhci_versal_sdcardclk_set_phase (struct clk_hw *hw , int degrees );

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💖 ARGUMENTS 💖

• hw — your pointer to the hardware clock structure 🕰️ literally just hand it over and it knows what to do.
• degrees — the clock phase shift, and it's gotta be between 0 and 359 🌀 (yes, degrees, like a circle, she's turning the clock, slay).

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🦋 DESCRIPTION 🦋

So what it actually does: it sets the SD Output Clock Tap Delays for the Output path 🫶 that's it, that's the whole vibe. Lowkey iconic that it's one line of a description and a whole lot of responsibility.

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✨ RETURN ✨

Returns 0 on success, and an error value on error 😭 (ngl, classic — you'll know if it didn't eat).

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👑 SEE ALSO 👑

The kernel file you're gonna wanna peek at is ./drivers/mmc/host/sdhci-of-arasan.c, and then all of these, fr fr:

• struct sdhci_arasan_soc_ctl_field(9)
• struct sdhci_arasan_soc_ctl_map(9)
• struct sdhci_arasan_clk_ops(9)
• struct sdhci_arasan_clk_data(9)
• struct sdhci_arasan_data(9)
• sdhci_arasan_syscon_write(9)
• sdhci_arasan_suspend(9)
• sdhci_arasan_resume(9)
• sdhci_arasan_sdcardclk_recalc_rate(9)
• sdhci_arasan_sampleclk_recalc_rate(9)
• sdhci_zynqmp_sdcardclk_set_phase(9)
• sdhci_zynqmp_sampleclk_set_phase(9)
• sdhci_versal_sampleclk_set_phase(9)
• sdhci_arasan_update_clockmultiplier(9)
• sdhci_arasan_update_baseclkfreq(9)
• arasan_dt_parse_clk_phases(9)
• sdhci_arasan_register_sdcardclk(9)
• sdhci_arasan_register_sampleclk(9)
• sdhci_arasan_unregister_sdclk(9)
• sdhci_arasan_update_support64b(9)
• sdhci_arasan_register_sdclk(9)

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bestie that's a whole friend group of functions, go say hi to all of them 🧚

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and that's the page!! 🎀 written from the ./drivers/mmc/host corner of the world, dated October 2026, in the Kernel API Manual — mwah, go set some phases 💜