sdhci_arasan_register_sdclk(9)

💖 NAME 💖

sdhci_arasan_register_sdclk — bestie, this is the one that registers the sdcardclk so a PHY can actually use it ✨

(oh also hiii, you're reading the Kernel API Manual page for this, and it's a whole vibe 🎀)

🌸 SYNOPSIS 🌸

int sdhci_arasan_register_sdclk (struct sdhci_arasan_data *sdhci_arasan
, struct clk *clk_xin , struct device *dev );

🦋 ARGUMENTS 🦋

• sdhci_arasan — our private data structure, it's giving main character energy ngl 👑
• clk_xin — pointer to the functional clock, she's the real one 🕐
• dev — pointer to our struct device, iconic as always 💅

⭐ DESCRIPTION ⭐

okay so here's the tea 🍓 — some PHY devices literally need to know what the actual card clock is. like, they can't function without it, no cap. and the way they find out? we hand them a clock through the common clock framework so they can go query it themselves. literally providing a service 😭🫶

💀 NOTE 💀

so, real talk: without seriously re-architecting SDHCI's clock code and testing on all platforms, there's genuinely no way to create a totally beautiful clock here with all clock ops implemented. like, not happening, not today 🙈

instead, we just create a clock that can be queried, and we set the CLK_GET_RATE_NOCACHE attribute to tell the common clock framework that we're doing things behind its back 👀 (sneaky, but it works). this should be sufficient to create nice clean device tree bindings, and later — if needed — we can try re-architecting SDHCI if we see some benefit to it. future us's problem, bestie 💜

🔥 RETURN 🔥

0 on success, and an error value on error. that's it, that's the whole vibe check ✅

🧚 SEE ALSO 🧚

kernel file ./drivers/mmc/host/sdhci-of-arasan.c plus the whole friend group:

• struct sdhci_arasan_soc_ctl_field(9)
• struct sdhci_arasan_soc_ctl_map(9)
• struct sdhci_arasan_clk_ops(9)
• struct sdhci_arasan_clk_data(9)
• struct sdhci_arasan_data(9)
• sdhci_arasan_syscon_write(9)
• sdhci_arasan_suspend(9)
• sdhci_arasan_resume(9)
• sdhci_arasan_sdcardclk_recalc_rate(9)
• sdhci_arasan_sampleclk_recalc_rate(9)
• sdhci_zynqmp_sdcardclk_set_phase(9)
• sdhci_zynqmp_sampleclk_set_phase(9)
• sdhci_versal_sdcardclk_set_phase(9)
• sdhci_versal_sampleclk_set_phase(9)
• sdhci_arasan_update_clockmultiplier(9)
• sdhci_arasan_update_baseclkfreq(9)
• arasan_dt_parse_clk_phases(9)
• sdhci_arasan_register_sdcardclk(9)
• sdhci_arasan_register_sampleclk(9)
• sdhci_arasan_unregister_sdclk(9)
• sdhci_arasan_update_support64b(9)

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and that's the page!! 🎀 brought to you straight out of ./drivers/mmc/host, dated October 2026 — slay, see you in the next manpage bestie 💖✨🦋