sba_io_pdir_entry(9)

🌸 sba_io_pdir_entry — the Kernel API Manual, section 9, bestie 💅

Okay so this is sba_io_pdir_entry(9) from the Kernel API Manual and it's literally just "fill in one IO PDIR entry." One entry. That's the whole job. She's a one-task icon and she ate. 🎀

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✨ SYNOPSIS ✨

void sba_io_pdir_entry (__le64 *pdir_ptr , space_t sid , phys_addr_t pba
, unsigned long hint );

No return value, no drama, just vibes and a void. 🫶

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🦋 ARGUMENTS 🦋

• pdir_ptr — pointer to the IO PDIR entry. This is the thing getting filled in, she's the main character of the operation tbh.
• sid — process Space ID — and heads up: currently only supports KERNEL_SPACE. That's it. That's the whole list. Don't come at her with other space IDs, she's not doing it 🙈
• pba — Physical address of the buffer to map.
• hint — DMA hint set to use for this mapping.

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💖 DESCRIPTION 💖

SBA Mapping Routine. Iconic. Legendary. Lowkey the backbone.

So here's the tea ☕: given a virtual address (vba, arg2) and space id, (sid, arg1) — yes, the arg numbering in there is a little chaotic, iykyk — sba_io_pdir_entry loads the I/O PDIR entry pointed to by pdir_ptr (arg0). Three args, arg0 arg1 arg2, she's counting them in a way that only she understands. Respect it. 💀

Using the bass-ackwards HP bit numbering, each IO Pdir entry for Astro/Ike looks like this:

0                    19                                 51   55       63
┌─────────────────────────────┐
│ V   U   PPN[43:12]   U   VI │
└─────────────────────────────┘

And Pluto is basically identical, except she supports fewer physical address bits:

0                       23                              51   55       63
┌─────────────────────────────┐
│ V   U   PPN[39:12]   U   VI │
└─────────────────────────────┘

Now the legend, because we're being thorough and also because you deserve to know:

• V == Valid Bit (Most Significant Bit is bit 0) — yes, MSB is bit 0, we're in HP land, nothing makes sense and that's the point 💅
• U == Unused
• PPN == Physical Page Number
• VI == Virtual Index (aka Coherent Index)

The LPA instruction output is put into the PPN field. And the LCI (Load Coherence Index) instruction provides the "VI" bits. Two instructions, two jobs, they don't overlap, we love a clean division of labour ✨

And then, the pre-swap: we pre-swap the bytes since PCX-W is Big Endian and the IOMMU uses little endian for the pdir. So like... the bytes get flipped before they land. Do not skip this step, do not "optimize" this step, this step is load-bearing 😭

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🧚 SEE ALSO 🧚

Kernel file ./drivers/parisc/sba_iommu.c — and honestly the whole friend group:

• sba_dump_ranges(9)
• sba_dump_tlb(9)
• sba_dump_pdir_entry(9)
• sba_check_pdir(9)
• sba_dump_sg(9)
• sba_search_bitmap(9)
• sba_alloc_range(9)
• sba_free_range(9)
• sba_mark_invalid(9)
• sba_dma_supported(9)
• sba_map_single(9)
• sba_unmap_phys(9)
• sba_alloc(9)
• sba_free(9)
• sba_map_sg(9)
• sba_unmap_sg(9)
• sba_get_iommu(9)
• sba_directed_lmmio(9)
• sba_distributed_lmmio(9)

Go read all of them, they're all slaying in their own lane 💜

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Sign-off time bestie 🌈✨ This little gem lives in ./drivers/parisc, dated October 2026, sitting pretty in section 9 of the Kernel API Manual. Mwah. Go fill in an entry. You've got this. 🍓🦋👑