regmap_add_irq_chip_fwnode(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 NAME 🌸

regmap_add_irq_chip_fwnode β€” use standard regmap IRQ controller handling. This page is from the Kernel API Manual, and it's literally the regmap_add_irq_chip_fwnode(9) glow-up: fwnode edition. πŸ’…βœ¨

✨ SYNOPSIS ✨

int regmap_add_irq_chip_fwnode (struct fwnode_handle *fwnode , struct
regmap *map , int irq , int irq_flags , int irq_base , const struct
regmap_irq_chip *chip , struct regmap_irq_chip_data **data );

πŸ’– ARGUMENTS πŸ’–

  • fwnode β€” the firmware node where the IRQ domain should be added to. that's the destination, bestie πŸŽ€
  • map β€” the regmap for the device. the device's regmap, iconic.
  • irq β€” the IRQ the device uses to signal interrupts. the interrupt signal's whole vibe.
  • irq_flags β€” the IRQF_ flags to use for the primary interrupt. flags for the primary interrupt β€” noted, bestie 🫢
  • irq_base β€” allocate at a specific IRQ number if irq_base > 0. conditional cutie.
  • chip β€” configuration for the interrupt controller. the controller config, slay.
  • data β€” runtime data structure for the controller, allocated on success. allocated on success β€” love that for you.

🌈 DESCRIPTION 🌈

Okay so, the return value: 0 on success or an errno on failure. That's it, that's the rule. 🌈

For this to be efficient, the chip really should use a register cache. no cap, it matters. And the chip driver is responsible for restoring the register values used by the IRQ controller over suspend and resume. driver's job, bestie β€” don't forget it. 🫢

πŸ¦‹ SEE ALSO πŸ¦‹


source/version: ./drivers/base/regmap Β· date: October 2026 Β· page: regmap_add_irq_chip_fwnode(9) β€” bye bestie, go make those IRQs iconic πŸ’…πŸ’–βœ¨

πŸ“¦ where this page comes from