radeon_atom_pick_pll(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 NAME 🌸

radeon_atom_pick_pll β€” Allocate a PPLL for use by the crtc. okay bestie, yes, this is the radeon_atom_pick_pll(9) page from the Kernel API Manual, and it's giving "tiny function, very specific PLL allocation era" πŸ’…βœ¨

✨ SYNOPSIS ✨

int radeon_atom_pick_pll (struct drm_crtc *crtc );

πŸŽ€ ARGUMENTS πŸŽ€

  • crtc β€” drm crtc. That's it, that's the argument, no cap. 🫢

πŸ’… DESCRIPTION πŸ’…

okay so this function returns the PPLL (Pixel PLL) that the crtc should use. For DP monitors, a single PPLL can be used for all DP crtcs/encoders β€” shared queen behavior, lowkey iconic. For non-DP monitors, a dedicated PPLL must be used. periodt.

If a particular board has an external DP PLL, return ATOM_PPLL_INVALID to skip PLL programming, because there is no need to program the PLL itself. And if we are not able to allocate a PLL, return ATOM_PPLL_INVALID to skip PLL programming to avoid messing up an existing monitor. fr fr, do not mess up the existing monitor.

🚨 ATOM_PPLL_INVALID is the "skip PLL programming" signal in both of those situations β€” external DP PLL on the board, or allocation failed. Keep that meaning intact, bestie.

πŸ”₯ Asic specific PLL information πŸ”₯

πŸ’– DCE 8.x KB/KV πŸ’–

  • PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) CI
  • PPLL0, PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) and DAC

🌸 DCE 6.1 🌸

  • PPLL2 is only available to UNIPHYA (both DP and non-DP)
  • PPLL0, PPLL1 are available for UNIPHYB/C/D/E/F (both DP and non-DP)

🌈 DCE 6.0 🌈

  • PPLL0 is available to all UNIPHY (DP only)
  • PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) and DAC

πŸ¦‹ DCE 5.0 πŸ¦‹

  • DCPLL is available to all UNIPHY (DP only)
  • PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) and DAC

⭐ DCE 3.0/4.0/4.1 ⭐

  • PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) and DAC

πŸ’œ SEE ALSO πŸ’œ


mwah πŸ’‹ this iconic page is from ./drivers/gpu/drm/radeon, dated October 2026, and it's the radeon_atom_pick_pll(9) page β€” bye bestie, go pick a PPLL responsibly 🫢✨

πŸ“¦ where this page comes from