phy_RFSerialWrite_8723B(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸŽ€ phy_RFSerialWrite_8723B(9) πŸŽ€

from the Kernel API Manual, bestie β€” manual name folded in right here, no cap. Let’s go πŸ’…

✨ NAME ✨

phy_RFSerialWrite_8723B β€” Write data to RF register (page 8~). πŸ’–

πŸ’– SYNOPSIS πŸ’–

void phy_RFSerialWrite_8723B (struct adapter *Adapter , enum rf_path eRFPath , u32 Offset , u32 Data );

🧚 ARGUMENTS 🧚

  • Adapter β€” this is the struct adapter *Adapter pointer, and the page gives it no extra description. Not me inventing one, bestie 🫢
  • enum rf_path eRFPath β€” Radio path of A/B/C/D. πŸ¦‹
  • u32 Offset β€” The target address to be read. πŸ‘€
  • u32 Data β€” The new register Data in the target bit position of the target to be read. πŸ’Ύ

🌸 DESCRIPTION 🌸

Okay so the page hits us with a big .. Note:: first: there are three types of serial operations:

  1. Software serial write
  2. Hardware LSSI-Low Speed Serial Interface
  3. Hardware HSSI-High speed serial write. Driver need to implement (1) and (2). This function is equal to the combination of RF_ReadReg and RFLSSIRead

Then another .. Note:: drops in, and it’s specifically for RF8256 only: The total count of RTL8256(Zebra4) register is around 36 bit, and it only employs 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration programming guide" for more details. Thus, we define a sub-finction for RTL8526 register address conversion. 😭 yes, the typo is canon, I’m keeping it.

Then the register-mode table, preserved in its full glory:

===========================================================
Register Mode    RegCTL[1]       RegCTL[0]       Note
                 (Reg00[12])     (Reg00[10])
===========================================================
Reg_Mode0        0               x               Reg 0 ~15(0x0 ~ 0xf)
------------------------------------------------------------------
Reg_Mode1        1               0               Reg 16 ~30(0x1 ~ 0xf)
------------------------------------------------------------------
Reg_Mode2        1               1               Reg 31 ~ 45(0x1 ~ 0xf)
------------------------------------------------------------------

And the changelog moment, copied exactly:

2008/09/02    MH      Add 92S RF definition

πŸ”₯ SEE ALSO πŸ”₯


πŸ’– that’s the whole page, bestie! cute sign-off: source/version ./drivers/staging/rtl8723bs/hal, date October 2026. bye, slay your RF register writes πŸ’…βœ¨

πŸ“¦ where this page comes from