pdc_adjust_pll(9)
π pdc_adjust_pll β the Kernel API Manual, bestie edition π
okay so this is pdc_adjust_pll(9), a kernel API page, and honestly it's giving "short but crucial" energy. It lives in the Linux kernel docs universe, and its whole personality is adjusting the PLL input clock in Hz β¨
πΈ NAME πΈ
pdc_adjust_pll β adjust the PLL input clock in Hz. That's it, that's the job, and she does it well π
β¨ SYNOPSIS β¨
void pdc_adjust_pll (struct ata_host *host , long pll_clock , unsigned
int board_idx );
so yeah, she returns void (no little gift back, just vibes), and she takes three things. Let's get into them π
π¦ ARGUMENTS π¦
hostβ the target ATA host, aka the main character of this little operation π«pll_clockβ the input of PLL in HZ, and yes the original saysHZin all caps, slay π₯board_idxβ the board identifier, so she knows which board she's dealing with π«Ά
π SEE ALSO π
bestie this list is long and honestly iconic for it. All of these are chilling in the kernel file ./drivers/ata/pata_pdc2027x.c, and here's the whole crew:
port_mmio(9)dev_mmio(9)pdc2027x_cable_detect(9)pdc2027x_port_enabled(9)pdc2027x_prereset(9)pdc2027x_mode_filter(9)pdc2027x_set_piomode(9)pdc2027x_set_dmamode(9)pdc2027x_set_mode(9)pdc2027x_check_atapi_dma(9)pdc_read_counter(9)pdc_detect_pll_input_clock(9)pdc_hardware_init(9)pdc_ata_setup_port(9)pdc2027x_init_one(9)
like okay family reunion π go read them if you want the full lore, iykyk π
π the cute sign-off π
this page comes to you from ./drivers/ata (the source/version situation), and it's dated October 2026. don't ask me how we're already there, time is fake π°οΈβ¨
no cap, that's the whole page β short, sweet, and she ate ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms