pci_swizzle_interrupt_pin(9)
π pci_swizzle_interrupt_pin β from the Kernel API Manual, bestie β¨
Okay so picture this: it's pci_swizzle_interrupt_pin(9), it lives in the Kernel API Manual, and it's here to do exactly one iconic little thing β swizzle INTx for a device behind a bridge. That's the whole vibe. Let's get into it π«Ά
β¨ SYNOPSIS β¨
u8 pci_swizzle_interrupt_pin (const struct pci_dev *dev , u8 pin );
π ARGUMENTS π
devβ the PCI device, fr. This is your main character here πpinβ the INTx pin, and the mapping is not mysterious, bestie, it's literally this:1=INTA,2=INTB,3=INTC,4=INTD. Memorize it, it's giving flashcards πΈ
π₯ DESCRIPTION π₯
So what does it actually do? It performs INTx swizzling for a device that's sitting behind one level of bridge. One. Level. Don't get cute with it π
And this isn't just a fun idea someone had β it's required by section 9.1 of the PCI-to-PCI bridge specification for devices behind bridges on add-in cards. So yeah, spec-mandated behavior, no cap π
Now here's the little plot twist: for devices with ARI enabled, the slot number is always 0. That's per the Implementation Note in section 2.2.8.1 of the PCI Express Base Specification, Revision 2.1. Write that down π
Lowkey the whole function is just "fix the pin number so the interrupt actually lands where it should." Small function, big slay β¨
π¦ SEE ALSO π¦
Kernel file ./drivers/pci/irq.c, and also these besties:
pci_request_irq(9)pci_free_irq(9)pci_common_swizzle(9)pci_check_and_mask_intx(9)pci_check_and_unmask_intx(9)pcibios_penalize_isa_irq(9)
And that's the page, gorgeous π β brought to you from the ./drivers/pci directory, dated October 2026, under the header pci_swizzle_interrupt_pin(9) in the Kernel API Manual. Go swizzle responsibly, mwah ππ§
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms