pci_iomap_wc_range(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 pci_iomap_wc_range(9) β€” Kernel API Manual 🌸

okay so bestie, welcome to the pci_iomap_wc_range(9) page. This is the Kernel API Manual, and we're about to get a virtual WC mapping cookie for a PCI BAR. It's giving low-level PCI, but make it cute. πŸ’…


πŸ’– NAME πŸ’–

pci_iomap_wc_range β€” create a virtual WC mapping cookie for a PCI BAR. That's the whole name vibe, periodt. ✨


πŸŽ€ SYNOPSIS πŸŽ€

the signature is literally this, character for character:

void __iomem * pci_iomap_wc_range (struct pci_dev *dev , int bar ,
       unsigned long offset , unsigned long maxlen );

πŸ¦‹ ARGUMENTS πŸ¦‹

  • dev β€” the PCI device that owns the BAR. Like, whose BAR is this? This one. 🫢
  • bar β€” the BAR number. Just the number, bestie. πŸ”’
  • offset β€” map memory at the given offset in BAR. That's the spot. ✨
  • maxlen β€” max length of the memory to map. The limit, the ceiling, the cap. πŸ‘‘

πŸ’œ DESCRIPTION πŸ’œ

Using this function gets you a __iomem address to your device BAR. That's the whole point. 🎯 You can access it using ioread*() and iowrite*(). These functions hide the details if this is a MMIO or PIO address space and will just do what you expect from them in the correct way. They're the main characters of access here, no cap. 🫢 When possible write combining is used. Slay. ✨

maxlen specifies the maximum length to map. If you want to get access to the complete BAR from offset to the end, pass 0 here. That's the shortcut, bestie β€” zero means the whole stretch from offset onward. πŸ”₯


🌈 SEE ALSO 🌈

Go peek at the kernel file ./drivers/pci/iomap.c β€” and also pci_iomap_range(9), pci_iomap(9), and pci_iomap_wc(9). iykyk. πŸ’–


mwah πŸ’‹ β€” sourced from ./drivers/pci, dated October 2026, page pci_iomap_wc_range(9), and that's the footer vibe, periodt. 🫢

πŸ“¦ where this page comes from