pch_gbe_phy_tx_clk_delay(9)

✨ NAME ✨

okay so bestie, this is pch_gbe_phy_tx_clk_delay(9) from the Kernel API Manual 💅 — and it is literally here to Setup TX clock delay via the PHY. That's the whole main-character job, no cap. 🎀

🌸 SYNOPSIS 🌸

int pch_gbe_phy_tx_clk_delay (struct pch_gbe_hw *hw );

🦋 ARGUMENTS 🦋

• hw — pointer to the HW structure. Returns 0: Successful. -EINVAL: Invalid argument. 💖

👑 SEE ALSO 👑

• Kernel file: ./drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
• pch_gbe_phy_get_id(9) — go say hi 🫶
• pch_gbe_phy_read_reg_miic(9) — iconic lil reg reader 🌈
• pch_gbe_phy_write_reg_miic(9) — the write-reg sister ⭐
• pch_gbe_phy_sw_reset(9) — software reset vibe check 🔥
• pch_gbe_phy_hw_reset(9) — hardware reset moment 💀
• pch_gbe_phy_power_up(9) — wakey wakey ✨
• pch_gbe_phy_power_down(9) — nap time 😴
• pch_gbe_phy_set_rgmii(9) — RGMII setup bestie 🦋
• pch_gbe_phy_init_setting(9) — init settings slay 💅
• pch_gbe_phy_disable_hibernate(9) — no hibernating rn 🙈

mwah 💖 source/version was ./drivers/net/ethernet/oki-sem..., dated October 2026, page pch_gbe_phy_tx_clk_delay(9). bye bestie! 🍓