navi10_ih_self_irq(9)

okay bestie, meet navi10_ih_self_irq(9) from the Kernel API Manual — she’s here to dispatch work for ring 1 and 2, and honestly? iconic 💅

💖 NAME 💖

navi10_ih_self_irq — dispatch work for ring 1 and 2 ✨

✨ SYNOPSIS ✨

int navi10_ih_self_irq (struct amdgpu_device *adev , struct
       amdgpu_irq_src *source , struct amdgpu_iv_entry *entry );

🦋 ARGUMENTS 🦋

• adev — an amdgpu_device pointer, bestie. 🫶
• source — the irq source. 🌸
• entry — an IV with a WPTR update. 👑

🌸 DESCRIPTION 🌸

Update the WPTR from the IV, then schedule work to handle the entries. That’s the whole little job, and yes, it ate. 🔥

🔥 SEE ALSO 🔥

• Kernel file: ./drivers/gpu/drm/amd/amdgpu/navi10_ih.c
• navi10_ih_init_register_offset(9)
• force_update_wptr_for_self_int(9)
• navi10_ih_toggle_ring_interrupts(9)
• navi10_ih_toggle_interrupts(9)
• navi10_ih_enable_ring(9)
• navi10_ih_irq_init(9)
• navi10_ih_irq_disable(9)
• navi10_ih_get_wptr(9)
• navi10_ih_irq_rearm(9)
• navi10_ih_set_rptr(9)

okayyy that’s the page, bestie 🫶 — source/version is ./drivers/gpu/drm/amd/amdgpu, dated October 2026, for navi10_ih_self_irq(9). periodt 💅