nand_ecc_choose_conf(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… nand_ecc_choose_conf β€” the Kernel API Manual tea β˜•

okay so bestie, we're in the Kernel API Manual today and this one is genuinely a little baddie: nand_ecc_choose_conf πŸŽ€

✨ NAME ✨

nand_ecc_choose_conf β€” it literally sets the ECC strength and the ECC step size πŸ’– (yes, both, she does both)

πŸ¦‹ SYNOPSIS πŸ¦‹

int nand_ecc_choose_conf (struct nand_chip *chip , const struct
nand_ecc_caps *caps , int oobavail );

🌸 ARGUMENTS 🌸

  • chip β€” the nand chip info structure, aka the whole personality of the chip we're configuring 🫢
  • caps β€” the ECC engine caps info structure, i.e. what this controller can actually do (her limits, respectfully)
  • oobavail β€” the OOB size that the ECC engine can use, your budget basically πŸ’Έ

πŸ‘‘ DESCRIPTION πŸ‘‘

So the whole vibe of this function is: choose the ECC configuration according to the following logic, and the logic is giving very much decision-tree main character energy 🌈

  1. If both ECC step size and ECC strength are already set (usually by DT, iykyk) then check if it is supported by this controller. Like, respect the choice but also do a vibe check on it πŸ”₯
  2. If the user provided the nand-ecc-maximize property, then select maximum ECC strength. Go big, no cap πŸ’…
  3. Otherwise, try to match the ECC step size and ECC strength closest to the chip's requirement. And if the available OOB size can't fit the chip requirement then fallback to the maximum ECC step size and ECC strength. Plan B slays πŸ¦‹

On success, the chosen ECC settings are set. Periodt ✨


⭐ SEE ALSO ⭐

Kernel file ./drivers/mtd/nand/raw/nand_base.c β€” and bestie, here's the whole friend group, everybody say hi πŸ‘‹


🫢 mwah, that's the whole page. catch u later β€” this one lives in ./drivers/mtd/nand/raw and it's dated October 2026 ⭐ so like, future icon behavior honestly πŸ’œπŸ’«

πŸ“¦ where this page comes from