mxl86110_synce_clk_cfg(9)
π mxl86110_synce_clk_cfg(9) β the Kernel API Manual, bestie edition π
okay so real talk, this is a page from the Kernel API Manual, and it's about one (1) function that applies your syncE/clk output configuration. yes that's the whole vibe. let's get into it β¨
πΈ NAME πΈ
mxl86110_synce_clk_cfg β applies syncE/clk output configuration π
like, it takes your SyncE and clock output settings and actually applies them. main character behaviour, honestly.
π¦ SYNOPSIS π¦
int mxl86110_synce_clk_cfg (struct phy_device *phydev );
that's it. one arg. iconic minimalism π«Ά
β¨ ARGUMENTS β¨
phydevβ pointer to thephy_deviceπ this is the PHY you're configuring, no cap.
π NOTE π
okay bestie, listen, this one's important: this function assumes the caller already holds the MDIO bus lock or otherwise has exclusive access to the PHY. π like, it is NOT doing that for you. you gotta bring your own lock, fr fr. do not come in here unlocked, that's giving race condition π
π RETURN π
0β slay, it worked β¨- negative
errnocode β not slay, something went wrong π
π SEE ALSO π
the whole friend group π«Ά:
- Kernel file
./drivers/net/phy/mxl-86110.c __mxl86110_write_extended_reg(9),__mxl86110_read_extended_reg(9),__mxl86110_modify_extended_reg(9)mxl86110_write_extended_reg(9),mxl86110_read_extended_reg(9),mxl86110_modify_extended_reg(9)mxl86110_get_wol(9),mxl86110_set_wol(9)mxl86110_broadcast_cfg(9)mxl86110_enable_led_activity_blink(9)π‘β¨mxl86110_config_rgmii_delay(9)mxl86110_config_init(9)mxl86111_probe(9)mxl86111_config_init(9)mxl86111_read_page(9),mxl86111_write_page(9)
and that's the page!! π this little number lives in ./drivers/net/phy, and it was dated October 2026 β so yeah, she's from the future, we stan a forward-thinking document π§β bye bestie, go hold that MDIO lock π₯
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms