mtrr_add_page(9)

💅 mtrr_add_page(9) — the mtrr_add_page page, but make it make sense

okay so bestie, you're in the Kernel API Manual and this is the page for mtrr_add_page. Sit down, hydrate, let's go. 🫶

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✨ NAME ✨

mtrr_add_page — literally just "add a memory type region". That's the whole vibe. 🎀

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🌸 SYNOPSIS 🌸

int mtrr_add_page (unsigned long base , unsigned long size , unsigned int type , bool increment );

yep, that's the whole signature, no notes. 💅

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🦋 ARGUMENTS 🦋

• base — the physical base address of your region, but measured in pages (and a page here is in units of 4 kB — read the exclamation mark, it's there for a reason, bestie 😭).
• size — physical size of the region, also in pages (4 kB).
• type — which flavour of MTRR you want. Pick from the list below, no off-menu ordering 🙈.
• increment — if this is true, we do usage counting on the region. like a little tally mark for your region 🧚.

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💖 DESCRIPTION 💖

so. Memory type region registers are the things that control caching on newer Intel processors and on non-Intel ones too (equal opportunity caching ✨). This function is how a driver politely requests that an MTRR gets added.

The details and the hardware specifics of how each processor actually implements it? Completely hidden from you, the caller. Not your problem, iconic behaviour 👑. But — and this is the important part — you should still expect to need to provide a power of two size on an equivalent power of two boundary. Like, the universe needs the numbers to line up. no cap.

If the region can't be added — either because all the regions are already in use, or because the CPU just cannot support it — you get a negative value back. Not a vibe. 💀

On success you get the register number for this entry returned… but please, please treat it as a cookie only. It's a little snack, not a promise. 🍓

On a multiprocessor machine the changes get made to all the processors. On x86 this is required by the Intel processors — non-negotiable, the whole squad is getting the update. 🌈

The available types are:

• MTRR_TYPE_UNCACHABLE — No caching. none. zero. nothing gets cached. 🚫
• MTRR_TYPE_WRBACK — Write data back in bursts whenever.
• MTRR_TYPE_WRCOMB — Write data back soon but allow bursts.
• MTRR_TYPE_WRTHROUGH — Cache reads but not writes.

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🐛 BUGS 🐛

Ok so known issue time, gather round 🔥: this needs a quiet flag for the cases where drivers do not mind failures and do not wish system log messages to be sent. Right now it's out here announcing everything. loud. main character energy, but in a bad way 😭.

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⭐ SEE ALSO ⭐

Kernel file ./arch/x86/kernel/cpu/mtrr/mtrr.c — go read the source, iykyk 💜

• mtrr_rendezvous_handler(9)
• set_mtrr(9)
• mtrr_add(9)
• mtrr_del_page(9)
• mtrr_del(9)
• arch_phys_wc_add(9)
• mtrr_bp_init(9)
• mtrr_save_state(9)

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and that's the page!! 🎀 sourced from ./arch/x86/kernel/cpu/mtrr, dated October 2026 — go off, kernel docs, we love to see it. mwah 💋✨