msm_gpio_upd..._edge_parent(9)

💅 msm_gpio_update_dual_edge_parent(9) — kernel API manual, but make it make sense

okay so bestie, welcome to the msm_gpio_upd..._edge_parent(9) page of the Kernel API Manual ✨ yes the title is abbreviated with dots, no that's not a typo of mine, that's literally how it's printed, iykyk 🎀

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✨ NAME ✨

msm_gpio_update_dual_edge_parent — primes the next edge for IRQs that are handled by the parent 🦋

like, it sets up the next edge. for parent-handled IRQs. that's the whole vibe check 💅

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✨ SYNOPSIS ✨

void msm_gpio_update_dual_edge_parent (struct irq_data *d );

no return value, it's a void girlie, she just does her thing and leaves 🌸

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✨ ARGUMENTS ✨

• d — the irq dta 🙈 (that's literally what the page says bestie, i'm not fixing it, i'm just reporting it — it's your struct irq_data *)

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✨ DESCRIPTION ✨

okay so this one is much like msm_gpio_update_dual_edge_pos, except it's for IRQs that are normally handled by the parent irqchip 👑

the logic in here is slightly different, and why?? because of what's easy to actually do with our parent — that's the constraint, that's the whole reason 🔥 but in principle, it's the same. same idea, different parent, no cap 💯

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🌈 SEE ALSO 🌈

• Kernel file ./drivers/pinctrl/qcom/pinctrl-msm.c — go read the source, it's giving main character energy 📖
• struct msm_pinctrl(9) — the struct herself 👑

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ngl this is a tiny page but every single detail is here, not me gatekeeping anything 🫶

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and that's the page!! mwah 💖 brought to you by source ./drivers/pinctrl/qcom, dated October 2026, and yes it's the msm_gpio_upd..._edge_parent(9) manual, we stan a consistent footer 🎀✨