mpi3mr_soft_reset_handler(9)

💅 NAME 💅

okay so bestie, this is a page from the Kernel API Manual for mpi3mr_soft_reset_handler(9), and the function is literally mpi3mr_soft_reset_handler — Reset the controller ✨. That's the whole main-character job, no cap.

🎀 SYNOPSIS 🎀

int mpi3mr_soft_reset_handler (struct mpi3mr_ioc *mrioc , u16
       reset_reason , u8 snapdump );

🦋 ARGUMENTS 🦋

• mrioc — Adapter instance reference, aka the controller's contact card 💖
• reset_reason — Reset reason code, the why-are-we-resetting receipts 👀
• snapdump — Flag to generate snapdump in firmware or not 🫶

🌸 DESCRIPTION 🌸

This is the handler for recovering the controller by issuing a soft reset or diag fault reset. The way that this is a blocking function is lowkey important: when one reset is executed, if any other resets come through, they will be blocked. All BSG requests will be blocked during the reset too. If controller reset is successful, then the controller will be reinitialized; otherwise the controller will be marked as not recoverable 😭. Periodt.

If the snapdump bit is set, the controller is issued with a diag fault reset so that the firmware can create a snap dump, and after that the firmware will result in an F000 fault, and the driver will issue a soft reset to recover from that 🫶.

🔥 RETURN 🔥

0 on success, non-zero on failure. That's it, bestie 💅.

👑 SEE ALSO 👑

Kernel file ./drivers/scsi/mpi3mr/mpi3mr_fw.c is the home base, and here's the whole friend group of refs — every single one, fr fr:

• mpi3mr_get_reply_desc(9), mpi3mr_process_op_reply_q(9), mpi3mr_blk_mq_poll(9), mpi3mr_isr_poll(9), mpi3mr_request_irq(9), mpi3mr_setup_isr(9)
• mpi3mr_reset_rc_name(9), mpi3mr_reset_type_name(9), mpi3mr_is_fault_recoverable(9), mpi3mr_print_fault_info(9), mpi3mr_save_fault_info(9), mpi3mr_get_iocstate(9)
• mpi3mr_free_ioctl_dma_memory(9), mpi3mr_alloc_ioctl_dma_memory(9), mpi3mr_fault_uevent_emit(9), mpi3mr_clear_reset_history(9), mpi3mr_issue_and_process_mur(9)
• mpi3mr_revalidate_factsdata(9), mpi3mr_bring_ioc_ready(9), mpi3mr_soft_reset_success(9), mpi3mr_diagfault_success(9), mpi3mr_set_diagsave(9), mpi3mr_issue_reset(9)
• mpi3mr_admin_request_post(9), mpi3mr_free_op_req_q_segments(9), mpi3mr_free_op_reply_q_segments(9), mpi3mr_delete_op_reply_q(9), mpi3mr_alloc_op_reply_q_segments(9), mpi3mr_alloc_op_req_q_segments(9)
• mpi3mr_create_op_reply_q(9), mpi3mr_create_op_req_q(9), mpi3mr_create_op_queues(9), mpi3mr_op_request_post(9), mpi3mr_check_rh_fault_ioc(9), mpi3mr_sync_timestamp(9)
• mpi3mr_print_pkg_ver(9), mpi3mr_watchdog_work(9), mpi3mr_start_watchdog(9), mpi3mr_stop_watchdog(9), mpi3mr_setup_admin_qpair(9), mpi3mr_issue_iocfacts(9)
• mpi3mr_check_reset_dma_mask(9), mpi3mr_process_factsdata(9), mpi3mr_alloc_reply_sense_bufs(9), mpimr_initialize_reply_sbuf_queues(9), mpi3mr_issue_iocinit(9), mpi3mr_unmask_events(9)
• mpi3mr_issue_event_notification(9), mpi3mr_process_event_ack(9), mpi3mr_alloc_chain_bufs(9), mpi3mr_port_enable_complete(9), mpi3mr_issue_port_enable(9), mpi3mr_repost_diag_bufs(9)
• mpi3mr_read_tsu_interval(9), mpi3mr_print_ioc_info(9), mpi3mr_cleanup_resources(9), mpi3mr_setup_resources(9), mpi3mr_enable_events(9), mpi3mr_init_ioc(9)
• mpi3mr_reinit_ioc(9), mpi3mr_memset_op_reply_q_buffers(9), mpi3mr_memset_op_req_q_buffers(9), mpi3mr_memset_buffers(9), mpi3mr_free_mem(9), mpi3mr_issue_ioc_shutdown(9)
• mpi3mr_cleanup_ioc(9), mpi3mr_drv_cmd_comp_reset(9), mpi3mr_flush_drv_cmds(9), mpi3mr_pel_wait_post(9), mpi3mr_pel_get_seqnum_post(9), mpi3mr_pel_wait_complete(9)
• mpi3mr_pel_get_seqnum_complete(9), mpi3mr_check_op_admin_proc(9), mpi3mr_post_cfg_req(9), mpi3mr_process_cfg_req(9), mpi3mr_cfg_get_dev_pg0(9), mpi3mr_cfg_get_sas_phy_pg0(9)
• mpi3mr_cfg_get_sas_phy_pg1(9), mpi3mr_cfg_get_sas_exp_pg0(9), mpi3mr_cfg_get_sas_exp_pg1(9), mpi3mr_cfg_get_enclosure_pg0(9), mpi3mr_cfg_get_sas_io_unit_pg0(9), mpi3mr_cfg_get_sas_io_unit_pg1(9)
• mpi3mr_cfg_set_sas_io_unit_pg1(9), mpi3mr_cfg_get_driver_pg1(9), mpi3mr_cfg_get_driver_pg2(9)

Catch you later, bestie — this page is signed off from the ./drivers/scsi/mpi3mr source and dated October 2026 💖✨🫶