mips_cm_l2sync_phys_base(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ mips_cm_l2sync_phys_base(9) ✨

okay so bestie, welcome to the Kernel API Manual πŸŽ€ β€” today's main character is mips_cm_l2sync_phys_base, and honestly? she's lowkey iconic in a very specific, very MIPS way. let's get into it πŸ’…


🌸 NAME 🌸

mips_cm_l2sync_phys_base β€” retrieve the physical base address of the CM L2-sync region

like, she gives you an address. a physical one. for the L2-sync region of the Coherence Manager. no cap. ✨


πŸ¦‹ SYNOPSIS πŸ¦‹

phys_addr_t mips_cm_l2sync_phys_base (void );

πŸŽ€ ARGUMENTS πŸŽ€

  • void β€” no arguments 😌 she takes nothing, she needs nothing, she simply returns. main character energy fr.

πŸ’– DESCRIPTION πŸ’–

okay so what this function does is it returns the physical base address of the Coherence Manager L2-cache only region 🫢. that's the whole vibe.

it ships with a default implementation, and the way that works is: it reads the CMGCRL2OnlySyncBase register where that register is available 🌟 β€” or, if it's not available, it just returns a 4K region just behind the CM GCR base address πŸ’….

and here's the cute part: platforms that figure out this address some other way can totally override her 😭 β€” you just define a function with the same prototype and boom, you're running your own version. custom fit, bestie. πŸ‘‘


πŸ”₯ SEE ALSO πŸ”₯

like yes, that's a whole friend group and they all live in ./arch/mips/include/asm together πŸ§šπŸ’œ


k that's the whole page bestie, go read the rest of the CM lore, it's giving deep MIPS brainrot in the best way πŸ’€πŸŒΈ

sign-off time πŸŽ€βœ¨ β€” this little masterpiece comes from ./arch/mips/include/asm, dated October 2026, and it's the mips_cm_l2sync_phys_base(9) page from the Kernel API Manual. slay, periodt, bye bestie πŸ’–πŸ‘‘

πŸ“¦ where this page comes from