mipi_dbi_spi_init(9)

💅 mipi_dbi_spi_init(9) — like, the MIPI DBI SPI interface init era

okay bestie, welcome to the Kernel API Manual ✨ this one's mipi_dbi_spi_init(9) and it's genuinely the setup baddie that gets your MIPI DBI SPI interface living. no cap.

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🌸 SYNOPSIS 🌸

int mipi_dbi_spi_init (struct spi_device *spi , struct mipi_dbi *dbi ,
                       struct gpio_desc *dc );

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🎀 ARGUMENTS 🎀

• spi — the SPI device, the whole reason we're here fr fr 🦋
• dbi — the MIPI DBI structure you're about to initialize, she's getting a glow-up
• dc — the D/C gpio, and it's optional bestie, no pressure 💅

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✨ DESCRIPTION ✨

so this function sets mipi_dbi->command, and it enables mipi_dbi->read_commands for all the usual read commands. iconic behaviour honestly. 🫶

after you call this, you gotta follow up with a call to mipi_dbi_dev_init or a driver-specific init. don't just leave her hanging 🙈

if dc is set, we assume a Type C Option 3 interface. if it's not set, we assume Type C Option 1. that's the vibe check right there ⭐

now, the endianness part — and yes this matters, listen up 📢

if the command is MIPI_DCS_WRITE_MEMORY_START and the pixel format is RGB565, endianness has to be taken into account. the MIPI DBI serial interface is big endian, and framebuffers are assumed stored in memory as little endian (DRM_FORMAT_BIG_ENDIAN is not supported, sorry babe 😭).

here's literally how endianness is handled:

• Option 1 (D/C as a bit) — the buffer is sent on the wire byte by byte, so the 16-bit buffer is byteswapped before transfer 🔥
• Option 3 (D/C as a gpio) — if the SPI controller supports 16 bits per word, the buffer can be sent as-is. if it doesn't, then the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf, and the buffer is sent 8 bpw. yes, that's on you bestie 💀

this handling is optimised for DRM_FORMAT_RGB565 framebuffers, and honestly? she ate. 👑

one more thing 🌈 — if the interface is Option 1 and the SPI controller doesn't support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary. little padded queen 🎀

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💖 RETURN 💖

Zero on success, negative error code on failure. simple as that, periodt. ✨

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🦋 SEE ALSO 🦋

• Kernel file ./drivers/gpu/drm/drm_mipi_dbi.c overview(9)
• mipi_dbi_command_read(9)
• mipi_dbi_command_buf(9)
• mipi_dbi_buf_copy(9)
• drm_mipi_dbi_crtc_helper_mode_valid(9)
• drm_mipi_dbi_plane_helper_atomic_check(9)
• drm_mipi_dbi_plane_helper_atomic_update(9)
• drm_mipi_dbi_crtc_helper_atomic_check(9)
• drm_mipi_dbi_crtc_helper_atomic_disable(9)
• drm_mipi_dbi_connector_helper_get_modes(9)
• drm_mipi_dbi_dev_init(9)
• mipi_dbi_hw_reset(9)
• mipi_dbi_display_is_on(9)
• mipi_dbi_poweron_reset(9)
• mipi_dbi_poweron_conditional_reset(9)
• mipi_dbi_spi_cmd_max_speed(9)
• mipi_dbi_spi_transfer(9)
• mipi_dbi_debugfs_init(9)

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okay that's the whole page, go forth and initialize 🌸 this came to you from ./drivers/gpu/drm, dated October 2026, and stamped mipi_dbi_spi_init(9) — mwah, love u, bye 💜💅