ixgbe_write_phy_reg_generic(9)
π ixgbe_write_phy_reg_generic(9) β from the Linux Kernel API Manual, bestie
Okay so picture this: you're deep in the kernel, you need to poke a PHY register, and you want it done correctly. That's this function. It writes a value to a specified PHY register, and it does it using the SWFW lock β which is why it's the one everybody reaches for. The manpage literally says "this function is needed in most cases," and honestly? It ate. π
β¨ NAME β¨
ixgbe_write_phy_reg_generic β writes a value to a specified PHY register using the SWFW lock. This function is needed in most cases. No cap. π«Ά
π¦ SYNOPSIS π¦
int ixgbe_write_phy_reg_generic (struct ixgbe_hw *hw , u32 reg_addr , u32 device_type , u16 phy_data );
π ARGUMENTS π
hwβ pointer to the hardware structure. The main character of the whole operation, lowkey. πreg_addrβ the 32-bit PHY register you wanna write to. Tell her where to go.device_typeβ a 5-bit device type. Tiny but mighty, five bits of pure intent. β¨phy_dataβ the actual data being written into that PHY register. The payload, the moment, the whole point. πΈ
π SEE ALSO π
First up, the kernel file where this lives:
./drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
And now the full squad β every single one of these, no skips, no cuts, periodt:
ixgbe_out_i2c_byte_ack(9)ixgbe_in_i2c_byte_ack(9)ixgbe_ones_comp_byte_add(9)ixgbe_read_i2c_combined_generic_int(9)ixgbe_write_i2c_combined_generic_int(9)ixgbe_probe_phy(9)ixgbe_identify_phy_generic(9)ixgbe_check_reset_blocked(9)ixgbe_get_phy_id(9)ixgbe_get_phy_type_from_id(9)ixgbe_reset_phy_generic(9)ixgbe_read_phy_reg_mdi(9)ixgbe_read_phy_reg_generic(9)ixgbe_write_phy_reg_mdi(9)ixgbe_msca_cmd(9)ixgbe_mii_bus_read_generic_c22(9)ixgbe_mii_bus_read_generic_c45(9)ixgbe_mii_bus_write_generic_c22(9)ixgbe_mii_bus_write_generic_c45(9)ixgbe_mii_bus_read_c22(9)ixgbe_mii_bus_read_c45(9)ixgbe_mii_bus_write_c22(9)ixgbe_mii_bus_write_c45(9)ixgbe_x550em_a_mii_bus_read_c22(9)ixgbe_x550em_a_mii_bus_read_c45(9)ixgbe_x550em_a_mii_bus_write_c22(9)ixgbe_x550em_a_mii_bus_write_c45(9)ixgbe_get_first_secondary_devfn(9)ixgbe_x550em_a_has_mii(9)ixgbe_mii_bus_init(9)ixgbe_setup_phy_link_generic(9)ixgbe_setup_phy_link_speed_generic(9)ixgbe_get_copper_speeds_supported(9)ixgbe_get_copper_link_capabilities_generic(9)ixgbe_check_phy_link_tnx(9)ixgbe_setup_phy_link_tnx(9)ixgbe_reset_phy_nl(9)ixgbe_identify_module_generic(9)ixgbe_identify_sfp_module_generic(9)ixgbe_identify_qsfp_module_generic(9)ixgbe_get_sfp_init_sequence_offsets(9)ixgbe_read_i2c_eeprom_generic(9)ixgbe_read_i2c_sff8472_generic(9)ixgbe_write_i2c_eeprom_generic(9)ixgbe_is_sfp_probe(9)ixgbe_read_i2c_byte_generic_int(9)ixgbe_read_i2c_byte_generic(9)ixgbe_read_i2c_byte_generic_unlocked(9)ixgbe_write_i2c_byte_generic_int(9)ixgbe_write_i2c_byte_generic(9)ixgbe_write_i2c_byte_generic_unlocked(9)ixgbe_i2c_start(9)ixgbe_i2c_stop(9)ixgbe_clock_in_i2c_byte(9)ixgbe_clock_out_i2c_byte(9)ixgbe_get_i2c_ack(9)ixgbe_clock_in_i2c_bit(9)ixgbe_clock_out_i2c_bit(9)ixgbe_raise_i2c_clk(9)ixgbe_lower_i2c_clk(9)ixgbe_set_i2c_data(9)ixgbe_get_i2c_data(9)ixgbe_i2c_bus_clear(9)ixgbe_tn_check_overtemp(9)
That's the whole page, bestie β every flag, every arg, every single SEE ALSO, all accounted for. π
Sign-off szn: this lil masterpiece comes to you from the source path ./drivers/net/ethernet/intel/i... and it's dated October 2026, still filed under ixgbe_write_phy_reg_generic(9). Slay. π¦β¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms