intel_tcc_get_offset_mask(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… intel_tcc_get_offset_mask β€” the Kernel API Manual, but make it cute

okay so bestie, welcome to intel_tcc_get_offset_mask(9) β€” yes that's the whole name, she's long but she's worth it. this is a lil page from the Kernel API Manual and honestly? she's short, she's sweet, she's giving "one job and she does it" energy. let's get into it πŸŽ€


✨ NAME ✨

intel_tcc_get_offset_mask β€” Returns the bitmask to read TCC offset. that's it. that's the whole gig. she hands you a mask, you go read your TCC offset. slay πŸ’…


🌸 SYNOPSIS 🌸

u32 intel_tcc_get_offset_mask (void );

look at her. no parameters, returns a u32. lowkey the cleanest signature ever, ngl πŸ¦‹


🫢 ARGUMENTS 🫢

  • void β€” no arguments. literally none. she doesn't want them, she doesn't need them, she's booked and busy on her own πŸ’€

πŸ’– DESCRIPTION πŸ’–

okay so here's the vibe: this function gets you the model-specific bitmask you need to extract TCC_OFFSET from the MSR TEMPERATURE_TARGET register. that's the whole thing, and it ate. πŸ”₯

⚠️ but listen, because this part matters: if the mask is 0, it means the processor does not support TCC offset. so a zero is not a cute little "teehee no mask today" moment β€” it's the hardware telling you that feature isn't there. do not ignore the zero, bestie 😭


πŸ‘‘ RETURN πŸ‘‘

she returns the model-specific bitmask for TCC offset. that's your value, go use it responsibly πŸ’œ


🧚 SEE ALSO 🧚

the whole friend group, all hanging out in the kernel file ./drivers/thermal/intel/intel_tcc.c:

go read them, they're all iconic in their own way 🌈


and that's the page, periodt ✨ this lil legend lives in ./drivers/thermal/intel, it's stamped October 2026, and it goes by intel_tcc_get_offset_mask(9) β€” okay bye, drink water, go read your MSRs responsibly πŸ“πŸ’–πŸ¦‹

πŸ“¦ where this page comes from