intel_pmc_gcr_update(9)

🎀 NAME 🎀

okay so bestie, welcome to the Kernel API Manual page for intel_pmc_gcr_update(9) — no cap, this one is short and sweet. It’s literally intel_pmc_gcr_update — Update PMC GCR register bits. slay. ✨

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🌸 SYNOPSIS 🌸

int intel_pmc_gcr_update (struct intel_pmc_dev *pmc , u32 offset , u32
       mask , u32 val );

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💅 ARGUMENTS 💅

• pmc — PMC device pointer. it’s giving “pass me the PMC device” energy 🫶
• offset — offset of GCR register from GCR address base. literally where the register lives 🎀
• mask — bit mask for update operation. this is the vibe check for which bits we’re touching ✨
• val — update value. the actual bits you want to write, bestie 💖

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🦋 DESCRIPTION 🦋

Updates the bits of given GCR register as specified by mask and val. that’s the whole plot, honestly — mask says which bits, val says what they become. iconic. 💫

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🔥 RETURN 🔥

Negative value on error or 0 on success. so if it’s mad, it’s negative; if it ate, it’s 0. periodt. 💅

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🌈 SEE ALSO 🌈

• Kernel file ./drivers/mfd/intel_pmc_bxt.c
• intel_pmc_gcr_read64(9)
• intel_pmc_s0ix_counter_read(9)
• simplecmd_store(9)
• northpeak_store(9)

go be nosy, bestie 🧚

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mwah 💋 this page is from ./drivers/mfd, it’s dated October 2026, and it’s serving intel_pmc_gcr_update(9) realness. bye bestie! 🫶