intel_link_b...ute_pipe_bpp(9)

💅 intel_link_bw_compute_pipe_bpp(9)

okay so bestie, welcome to the Kernel API Manual, and today's main character is intel_link_bw_compute_pipe_bpp — yes that's a mouthful, yes it ate, let's get into it 🎀

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✨ NAME ✨

intel_link_bw_compute_pipe_bpp — literally computes the pipe bpp, but like... limited by the max link bpp 👑 no cap.

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🌸 SYNOPSIS 🌸

bool intel_link_bw_compute_pipe_bpp (struct intel_crtc_state *crtc_state
);

it's giving "one argument, one bool, done" energy 💅

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🦋 ARGUMENTS 🦋

• crtc_state — the crtc state 🫶 that's it, that's the whole argument. she's simple, she's iconic.

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💖 DESCRIPTION 💖

so the way that this works is: this function computes the pipe bpp limited by the CRTC's maximum link bpp. iykyk ✨

Encoders can call this function during state computation — but only in the simple case, where the link bpp will always match the pipe bpp. that's the vibe. 🧚

and who is that simple case for, you ask? literally all non-DP encoders. meanwhile DP encoders are out here using a link bpp lower than pipe bpp in case of DSC compression — different journey, different lore 😭💀

Returns true in case of success 💚 and returns false if the pipe bpp would need to be reduced below its valid range. like — if she'd have to go below her valid range, that's a no from her 🙈

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⭐ SEE ALSO ⭐

• Kernel file: ./drivers/gpu/drm/i915/display/intel_link_bw.c — go read it bestie, it's right there 🔥
• intel_link_bw_init_limits(9)
• __intel_link_bw_reduce_bpp(9)
• intel_link_bw_set_bpp_limit_for_pipe(9)
• intel_link_bw_atomic_check(9)

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ngl this whole friend group lives in ./drivers/gpu/drm/i915/display and honestly? they're all slaying in their own way 🌈

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and that's the tea, fr fr 🍓 this page came to you courtesy of ./drivers/gpu/drm/i915/display, dated October 2026, and titled intel_link_b...ute_pipe_bpp(9) — periodt 💜✨