intel_guc_ggtt_offset(9)
π intel_guc_ggtt_offset(9) β like, the GGTT offset getter, bestie
okay so this is a page from the Kernel API Manual and it's all about intel_guc_ggtt_offset β a tiny little function that grabs the GGTT offset of a vma and validates it. yes, both. overachiever behavior honestly π
β¨ NAME β¨
intel_guc_ggtt_offset β get and validate the GGTT offset of @vma π
π¦ SYNOPSIS π¦
u32 intel_guc_ggtt_offset (struct intel_guc *guc , struct i915_vma *vma
);
it takes two things and gives you back a u32. slay. β¨
πΈ ARGUMENTS πΈ
gucβ theintel_gucstructure. that's the GuC guy himself π«Άvmaβ the i915 graphics virtual memory area. the actual memory vibe we're talking about π
π DESCRIPTION π
okay so here's the situation, and it's giving exclusive. GuC does not allow any gfx GGTT address that falls into the range [0, ggtt.pin_bias). periodt. that range is reserved β it's for Boot ROM, SRAM and WOPCM, so it's very much taken π₯
so, currently, in order to exclude the [0, ggtt.pin_bias) address space from GGTT, all gfx objects used by GuC are allocated with intel_guc_allocate_vma and pinned with PIN_OFFSET_BIAS along with the value of ggtt.pin_bias. like, the whole workflow, no skipped steps. that's the whole trick π§
β RETURN β
the GGTT offset of the vma. that's it, that's the tea π
π SEE ALSO π
- Kernel file
./drivers/gpu/drm/i915/gt/uc/intel_guc.handstruct intel_guc(9)β go read those too, iykyk π
ngl bestie this one's short but it matters β mess with that pin bias range and GuC will simply not have it π
okay bye ily, this page came from ./drivers/gpu/drm/i915/gt/uc, dated October 2026, and it's literally intel_guc_ggtt_offset(9) πβ¨π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms