intel_dp_tu...on_supported(9)

💖 NAME 💖

intel_dp_tunnel_pr_optimization_supported — bestie, this is the little query that asks: does this DP tunnel support PR BW optimization? 👀✨

So this page is from the Kernel API Manual, and we're gonna get into it.

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✨ SYNOPSIS ✨

bool intel_dp_tunnel_pr_optimization_supported (struct intel_dp
*intel_dp );

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🎀 ARGUMENTS 🎀

• intel_dp — the DP port object 💅 that's the main character here.

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🦋 DESCRIPTION 🦋

Okay so this function literally queries whether a DP tunnel supports the PR BW optimization. That's the whole vibe check. 🌸

It returns true if the BW allocation mode is supported on intel_dp. Periodt. 💖

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🌈 SEE ALSO 🌈

The kernel file is right here, no cap:

• ./drivers/gpu/drm/i915/display/intel_dp_tunnel.c

And these iconic functions are all linked up:

• intel_dp_tunnel_disconnect(9)
• intel_dp_tunnel_destroy(9)
• intel_dp_tunnel_detect(9)
• intel_dp_tunnel_bw_alloc_is_enabled(9)
• intel_dp_tunnel_suspend(9)
• intel_dp_tunnel_resume(9)
• intel_dp_tunnel_atomic_cleanup_inherited_state(9)
• intel_dp_tunnel_atomic_add_state_for_crtc(9)
• intel_dp_tunnel_atomic_check_state(9)
• intel_dp_tunnel_atomic_compute_stream_bw(9)
• intel_dp_tunnel_atomic_clear_stream_bw(9)
• intel_dp_tunnel_atomic_check_link(9)
• intel_dp_tunnel_atomic_alloc_bw(9)
• intel_dp_tunnel_mgr_init(9)
• intel_dp_tunnel_mgr_cleanup(9)

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And that's the page, bestie 🫶 this cutie lives under ./drivers/gpu/drm/i915/display, dated October 2026, and it's giving intel_dp_tunnel_pr_optimization_supported(9) energy from the Kernel API Manual 💅✨