i915_gem_fence_size(9)
π NAME π
okay bestie, welcome to i915_gem_fence_size(9) from the Kernel API Manual β the manual name is literally right there in the group chat. This function is all about the required global GTT size for a fence, periodt.
β¨ SYNOPSIS β¨
bestie, the signature is giving exactly this:
u32 i915_gem_fence_size (struct drm_i915_private *i915 , u32 size ,
unsigned int tiling , unsigned int stride );
π¦ ARGUMENTS π¦
i915β i915 device. Yep, the i915 device itself, the main character of this call.sizeβ object size. The size of the object, no cap.tilingβ tiling mode. Which tiling mode we're rolling with.strideβ tiling stride. The tiling stride value, iykyk.
πΈ DESCRIPTION πΈ
okay so here's the tea: it returns the required global GTT size for a fence β that's the view of a tiled object β and it takes into account potential fence register mapping. That's the whole function, bestie, and it's lowkey iconic β¨.
π SEE ALSO π
Go peek at these cross-reference besties:
- Kernel file
./drivers/gpu/drm/i915/gem/i915_gem_tiling.c buffer object tiling(9)i915_gem_fence_alignment(9)i915_gem_set_tiling_ioctl(9)i915_gem_get_tiling_ioctl(9)
kisses and slay π
, this page's source/version is ./drivers/gpu/drm/i915/gem, the date is October 2026, and the title is still i915_gem_fence_size(9) π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms