fsl_dma_hw_params(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– fsl_dma_hw_params β€” Kernel API Manual ✨

okay bestie, so this page is all about fsl_dma_hw_params(9) β€” that's the kernel API manual entry, the whole doc lives in the kernel API manual set, and we're about to get into it πŸŽ€

🌸 NAME 🌸

fsl_dma_hw_params β€” continue initializing the DMA links ✨

πŸ¦‹ SYNOPSIS πŸ¦‹

int fsl_dma_hw_params (struct snd_soc_component *component , struct
       snd_pcm_substream *substream , struct snd_pcm_hw_params *hw_params );

literally the whole signature up there, no notes πŸ’…

πŸ’œ ARGUMENTS πŸ’œ

so the original is kinda shy about these, ngl. it says:

  • component β€” -- undescribed --
  • substream β€” -- undescribed --
  • hw_params β€” -- undescribed --

and that's it, that's the tea 🍡 like the manpage genuinely just leaves all three as "undescribed" so i'm not gonna sit here and make stuff up about them, iykyk πŸ™ˆ

πŸ”₯ DESCRIPTION πŸ”₯

okay so here's what it actually does: this function obtains hardware parameters about the opened stream and programs the DMA controller accordingly. icon behaviour honestly πŸ‘‘

now, the main character energy of this whole page is the big-endian situation, so let's talk about it. one drawback of big-endian is that when you're copying integers of different sizes into a fixed-sized register, the address you have to copy the integer to depends on the size of the integer. the way that's kind of a whole thing 😭

for example β€” and this is the example straight from the page, keep up bestie:

  • if P is the address of a 32-bit register, and X is a 32-bit integer, then X should be copied to address P.
  • however, if X is a 16-bit integer, then it should be copied to P+2.
  • if X is an 8-bit register, then it should be copied to P+3.

so for playback of 8-bit samples, the DMA controller must transfer single bytes from the DMA buffer to the last byte of the STX0 register β€” i.e. offset by 3 bytes. for 16-bit samples, the offset is two bytes. 🫢

and for 24-bit samples, the offset is 1 byte. BUT β€” and this is the part where you gotta pay attention 🚨 β€” the DMA controller does not support 3-byte copies (the DAHTS register supports only 1, 2, 4, and 8 bytes at a time). so we do not support packed 24-bit samples. 24-bit data must be padded to 32 bits. periodt. no packed 24-bit for you, that's the rule πŸ’€

fr fr do not try to sneak packed 24-bit samples past this thing β€” it's not a vibe, it's just not supported, the hardware genuinely can't do the 3-byte copy 🌸

🌈 SEE ALSO 🌈

go read the whole squad, they're all iconic in their own way πŸ’–


and that's the page!! πŸŽ€ this one lives under ./sound/soc/fsl in the kernel API manual, dated October 2026 β€” so yeah, future vibes, slay ⭐ bye bestie, go program that DMA controller responsibly πŸ’…βœ¨

πŸ“¦ where this page comes from