fsl_chan_set_dst_loop_size(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… fsl_chan_set_dst_loop_size

Okay bestie, welcome to the Kernel API Manual page for fsl_chan_set_dst_loop_size(9) β€” yes that name is a whole mouthful, and yes we're gonna get through it together. 🫢

✨ NAME ✨

fsl_chan_set_dst_loop_size β€” set the destination address hold transfer size

🌸 SYNOPSIS 🌸

void fsl_chan_set_dst_loop_size (struct fsldma_chan *chan , int size );

πŸŽ€ ARGUMENTS πŸŽ€

  • chan β€” a Freescale DMA channel. That's the little guy you're configuring πŸ’–
  • size β€” the address loop size. Pass 0 to disable the loop entirely, no cap.

πŸ¦‹ DESCRIPTION πŸ¦‹

So this one sets the destination address hold transfer size β€” the destination address hold, aka the loop transfer size. Lowkey obsessed with how simple the concept is once you see it.

Here's the vibe: when the DMA transfers data to the destination address (TA), and the loop size is 4, the DMA will write data to TA, TA + 1, TA + 2, TA + 3 β€” and then loop right back around to TA, TA + 1 … and so on, forever and ever, main character energy. πŸ”βœ¨

πŸ‘‘ SEE ALSO πŸ‘‘

Kernel file ./drivers/dma/fsldma.c, plus these iconic siblings:


That's the whole page, bestie β€” nothing skipped, nothing spilled. πŸ“

Sign-off time: this cutie lives in ./drivers/dma, dated October 2026, and it's filed under fsl_chan_set_dst_loop_size(9). Slay, go configure your DMA loop sizes responsibly. πŸ’…πŸ’œ

πŸ“¦ where this page comes from