drm_scdc_set..._clock_ratio(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… drm_scdc_set_high_tmds_clock_ratio(9) β€” from the Kernel API Manual, bestie πŸŽ€

okay so picture this: you're deep in the kernel, specifically the DRM/SCDC corner of it, and you need to flip the TMDS clock ratio around. that's literally this whole function. welcome to the group chat πŸ’–


✨ NAME ✨

drm_scdc_set_high_tmds_clock_ratio β€” bestie, it sets the TMDS clock ratio. that's the whole vibe check πŸ¦‹


🌸 SYNOPSIS 🌸

bool drm_scdc_set_high_tmds_clock_ratio (struct drm_connector *connector
, bool set );

πŸŽ€ ARGUMENTS πŸŽ€

  • connector β€” the connector. yep. that's it. that's the connector. she's just a connector 🫢
  • set β€” ret or reset the high clock ratio. it's giving "on or off" energy, no further notes πŸ’…

πŸ”₯ DESCRIPTION πŸ”₯

okay so the TMDS clock ratio math is actually kind of iconic once you see it laid out, so let's go, no cap:

  • TMDS character = 10 bit TMDS encoded value
  • TMDS character rate = the rate at which TMDS characters are transmitted (Mcsc)
  • TMDS bit rate = 10x the TMDS character rate

and as per the spec (in case you were wondering, and you were wondering):

  • TMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate
  • TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate

so what does the function actually do? she writes to the TMDS config register over the SCDC channel, and then:

  • sets the TMDS clock ratio to 1/40 when set = 1
  • sets the TMDS clock ratio to 1/10 when set = 0

that's the tea. the whole thing. go off πŸ‘‘


⭐ RETURN ⭐

True if the write is successful, false otherwise. literally just vibes: did it work or not πŸ™ˆ


🌈 SEE ALSO 🌈


and that's the whole page, bestie πŸ’œ this little gem lives in ./drivers/gpu/drm/display, and it was dated October 2026 β€” so go forth and set those clock ratios, mwah πŸ“πŸ§šβœ¨

πŸ“¦ where this page comes from