drm_dp_tunn...x_lane_count(9)
π drm_dp_tunnel_max_dprx_lane_count β NAME β¨
Okay so bestie, welcome to the Kernel API Manual π β this one's called drm_dp_tunnel_max_dprx_lane_count, and it's literally here to query the maximum lane count of the tunnel's DPRX. That's it, that's the whole vibe. π¦
πΈ SYNOPSIS πΈ
int drm_dp_tunnel_max_dprx_lane_count (const struct drm_dp_tunnel
*tunnel );
Likeβ¦ that's the whole signature. Short king. π
β¨ ARGUMENTS β¨
tunnelβ the tunnel object π«Ά that's it, that's the argument, she's aconst struct drm_dp_tunnel *and she's doing her best.
π DESCRIPTION π
So this function is the one you call when you need to ask: hey, what's the maximum lane count of the DPRX connected to tunnel? π§β¨ And she will tell you. She's an icon, she answers.
But here's the important bit, and you must clock this: this lane count is not limited by the BW limit of the tunnel. Not even a little. Which is, like, the opposite of how the standard and extended DP_MAX_LANE_COUNT DPCD registers behave. So don't go assuming they match, because they do not, and that would be an embarrassing moment for you personally. π
Returns the maximum lane count. That's the return value. Slay. π
π¦ SEE ALSO π¦
The kernel file lives at ./drivers/gpu/drm/display/drm_dp_tunnel.c β go read it, she's stunning. π
And here's the whole tunnel friend group, all of them, no cap, every single one π«Ά:
drm_dp_tunnel_get(9)drm_dp_tunnel_put(9)drm_dp_tunnel_set_io_error(9)drm_dp_tunnel_detect(9)drm_dp_tunnel_destroy(9)drm_dp_tunnel_enable_bw_alloc(9)drm_dp_tunnel_disable_bw_alloc(9)drm_dp_tunnel_bw_alloc_is_enabled(9)drm_dp_tunnel_pr_optimization_supported(9)drm_dp_tunnel_alloc_bw(9)drm_dp_tunnel_get_allocated_bw(9)drm_dp_tunnel_update_state(9)drm_dp_tunnel_128b132b_supported(9)drm_dp_tunnel_128b132b_lane0_mapping_supported(9)drm_dp_tunnel_128b132b_dprx_rates(9)drm_dp_tunnel_max_dprx_rate(9)drm_dp_tunnel_available_bw(9)drm_dp_tunnel_atomic_get_state(9)drm_dp_tunnel_atomic_get_old_state(9)drm_dp_tunnel_atomic_get_new_state(9)drm_dp_tunnel_atomic_set_stream_bw(9)drm_dp_tunnel_atomic_get_required_bw(9)drm_dp_tunnel_atomic_get_group_streams_in_state(9)drm_dp_tunnel_atomic_check_stream_bws(9)drm_dp_tunnel_mgr_create(9)drm_dp_tunnel_mgr_destroy(9)
Ok that's the whole page, bestie, go forth and query those lane counts responsibly π
Mwah π β this cutie came out of ./drivers/gpu/drm/display, dated October 2026, and it's filed under drm_dp_tunn...x_lane_count(9). Byeee! πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms