devm_cxl_add_classdev(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– NAME πŸ’–

devm_cxl_add_classdev β€” add a CXL memory class-code device.

okay so this page is from the Kernel API Manual, and it's giving section 9 energy for devm_cxl_add_classdev(9). Bestie, we're adding a CXL memory class-code device, no cap. ✨

🌸 SYNOPSIS 🌸

struct cxl_memdev * devm_cxl_add_classdev (struct cxl_dev_state *cxlds
);

That's the whole signature, literally. 🫢

πŸŽ€ ARGUMENTS πŸŽ€

  • cxlds β€” the CXL device state you're associating with the memdev. That's the one, bestie. πŸ’…

πŸ’… DESCRIPTION πŸ’…

When the call returns, the device will have had a chance to attach to the cxl_mem driver. But heads up: it may fail to attach if the CXL topology is not ready β€” that means hardware CXL link down, or software platform CXL root not attached. 😭

The parent of the resulting device and the devm context for allocations is cxlds->dev. Periodt.

πŸ¦‹ SEE ALSO πŸ¦‹

Kernel file ./drivers/cxl/mem.c, plus cxl mem(9) and devm_cxl_probe_mem(9). Go read those if you want the full lore. πŸ“šβœ¨


mwah πŸ’‹ β€” sourced from ./drivers/cxl, dated October 2026, all about devm_cxl_add_classdev(9). πŸ’–

πŸ“¦ where this page comes from