davinci_pll_div_register(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… davinci_pll_div_register β€” okay bestie, let's talk DIV clocks

So this is a page straight out of the Kernel API Manual, and it's all about davinci_pll_div_register β€” the shared *DIV clock implementation for DaVinci PLLs. Yes, it's giving "niche kernel-internals realness," and honestly? Obsessed. πŸŽ€


✨ SYNOPSIS ✨

struct clk * davinci_pll_div_register (struct device *dev , const char
*name , const char *parent_name , void __iomem *reg , bool fixed , u32
flags );

Like, that's the whole vibe right there β€” you hand it a device, some names, a register, and a couple of knobs, and it hands you back a struct clk *. Slay. πŸ’…


🌸 ARGUMENTS 🌸

  • dev β€” the PLL platform device, or NULL if you're feeling ✨unattached✨
  • name β€” the clock name, i.e. what this little icon is called πŸ‘‘
  • parent_name β€” the parent clock name, its main character ancestor fr fr
  • reg β€” the *DIV register, the actual spot where the magic lives
  • fixed β€” if true, the divider is a fixed value; no wiggle room, it's set in stone bestie 🫢
  • flags β€” a bitmap of CLK_* flags from clock-provider.h 🌈

πŸ¦‹ SEE ALSO πŸ¦‹

Like a little clock-registration friend group. All iconic, all in the same directory. πŸ’–


ngl the whole "register a clock from a PLL divider" thing sounds intimidating but it's just the kernel being extra. Read the SEE ALSO list, you'll be fine. 🧚

Okay that's the page!! Mwah πŸ’œ This gem lives in ./drivers/clk/davinci under the Kernel API Manual, dated October 2026 β€” go off, king. ⭐

πŸ“¦ where this page comes from