davinci_pll_div_register(9)
π davinci_pll_div_register β okay bestie, let's talk DIV clocks
So this is a page straight out of the Kernel API Manual, and it's all about davinci_pll_div_register β the shared *DIV clock implementation for DaVinci PLLs. Yes, it's giving "niche kernel-internals realness," and honestly? Obsessed. π
β¨ SYNOPSIS β¨
struct clk * davinci_pll_div_register (struct device *dev , const char
*name , const char *parent_name , void __iomem *reg , bool fixed , u32
flags );
Like, that's the whole vibe right there β you hand it a device, some names, a register, and a couple of knobs, and it hands you back a struct clk *. Slay. π
πΈ ARGUMENTS πΈ
devβ the PLL platform device, orNULLif you're feeling β¨unattachedβ¨nameβ the clock name, i.e. what this little icon is called πparent_nameβ the parent clock name, its main character ancestor fr frregβ the*DIVregister, the actual spot where the magic livesfixedβ iftrue, the divider is a fixed value; no wiggle room, it's set in stone bestie π«Άflagsβ a bitmap ofCLK_*flags fromclock-provider.hπ
π¦ SEE ALSO π¦
- Kernel file
./drivers/clk/davinci/pll.cβ literally the source of truth, go read it iykyk struct davinci_pll_clk(9)davinci_pll_clk_register(9)davinci_pll_auxclk_register(9)davinci_pll_sysclkbp_clk_register(9)davinci_pll_obsclk_register(9)davinci_pll_sysclk_register(9)
Like a little clock-registration friend group. All iconic, all in the same directory. π
ngl the whole "register a clock from a PLL divider" thing sounds intimidating but it's just the kernel being extra. Read the SEE ALSO list, you'll be fine. π§
Okay that's the page!! Mwah π This gem lives in ./drivers/clk/davinci under the Kernel API Manual, dated October 2026 β go off, king. β
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms