CXL PCI(9)

✨ cxl pci(9) ✨

okay so bestie, welcome to the Kernel API Manual page for cxl pci 🫶 this one is literally about implementing the PCI exclusive functionality for a CXL device, exactly as defined by the Compute Express Link specification. Here's the tea: CXL devices may surface certain functionality even if they aren't CXL enabled — yes, fr fr, that's a thing. And while this driver is focused around the PCI specific aspects of a CXL device, it binds to the specific CXL memory device class code, so the implementation of cxl_pci is focused around CXL memory devices. iconic behavior, no cap 💅

🌸 cxl pci 🌸

This driver has several responsibilities, mainly:

• Create the memX device and register it on the CXL bus. 👑
• Enumerate the device's register interface and map them. 🔥
• Register the nvdimm bridge device with cxl_core. 🦋
• Register a CXL mailbox with cxl_core. 💌

🔍 SEE ALSO 🔍

• Kernel file ./drivers/cxl/pci.c
• __cxl_pci_mbox_send_cmd(9)

mwah 💋 signed off from ./drivers/cxl — that's the source/version bit — and dated October 2026 — periodt. 🎀