__cxl_pci_mbox_send_cmd(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’Œ __cxl_pci_mbox_send_cmd(9) β€” Kernel API Manual, but make it make sense

okay so bestie, grab your iced matcha πŸ“ because we're diving into the Kernel API Manual and today's main character is __cxl_pci_mbox_send_cmd β€” aka the function that literally just executes a mailbox command. That's it, that's the vibe. ✨


✨ NAME ✨

__cxl_pci_mbox_send_cmd β€” execute a mailbox command πŸ’…


πŸŽ€ SYNOPSIS πŸŽ€

int __cxl_pci_mbox_send_cmd (struct cxl_mailbox *cxl_mbox , struct
       cxl_mbox_cmd *mbox_cmd );

like, it takes two pointers and gives you back an int. no cap. 🫢


πŸ¦‹ ARGUMENTS πŸ¦‹

  • cxl_mbox β€” the CXL mailbox context, aka the whole entire setting, the stage, the environment 🌸
  • mbox_cmd β€” the command you're sending to the memory device. this is the actual message, the ~content~ πŸ‘‘

πŸ‘‘ CONTEXT πŸ‘‘

Any context. literally any. Any context. but β€” and this is the important part, bestie β€” it expects mbox_mutex to be held. so like, hold the lock or perish πŸ”₯ (not literally perish but you know what I mean).


πŸ’– RETURN πŸ’–

  • -ETIMEDOUT β€” if a timeout occurred waiting for completion 😭 like it was waiting and waiting and the clock ran out
  • 0 β€” on success πŸŽ‰ slay
⚠️ okay so this is the part people always skip and I cannot let you skip it: the caller should check the return code in mbox_cmd to make sure it succeeded. yes, even if this function returns 0. yes, both. check the one inside mbox_cmd. iykyk πŸ™ˆ

🌈 DESCRIPTION 🌈

so this is the generic form of the CXL mailbox send command β€” meaning it only uses the registers defined by the mailbox capability ID, specifically CXL 2.0 8.2.8.4. iconic spec energy πŸ“–βœ¨

Memory devices, and perhaps other types of CXL devices, may have further information available upon error conditions πŸ‘€ like they might have ✨extra tea✨ to spill when something goes wrong.

Driver facilities that wish to send mailbox commands should use the wrapper command. not this raw one. use the wrapper. be a wrapper girlie πŸ’…

aaaand now the lore 🧚: the CXL spec allows for up to two mailboxes. the intention is:

  • the primary mailbox β†’ OS controlled πŸ–₯️
  • the secondary mailbox β†’ used by system firmware πŸ”§

this is so the OS and the firmware can communicate with the device and not need to coordinate with each other β€” like two besties texting the same group chat without ever planning it 🫢

and the driver? the driver only uses the primary mailbox. periodt. πŸŽ€


⭐ SEE ALSO ⭐

  • Kernel file ./drivers/cxl/pci.c
  • cxl
  • pci(9)

okay that's the whole page, you ate that πŸ’œ go forth and hold your mutex bestie. this was the Kernel API Manual, ./drivers/cxl, October 2026 β€” mwah, see you in the next manpage πŸ’‹πŸŽ€πŸ¦‹

πŸ“¦ where this page comes from