clk_hw_register(9)
π clk_hw_register(9) β Kernel API Manual, but make it make sense
okay bestie, welcome to the clk_hw_register(9) page from the Kernel API Manual β¨ this is the one you come to when you've got a shiny new clock and you need the kernel to actually know about it. no cap, it's kind of a big deal.
πΈ NAME πΈ
clk_hw_register β register a clk_hw and get an error code back, periodt π
π SYNOPSIS π
int clk_hw_register (struct device *dev , struct clk_hw *hw );
like, that's it. two arguments. you got this π«Ά
β¨ ARGUMENTS β¨
devβ the device that's registering this clock. the one putting its name on the lease, basically πhwβ the link to your hardware-specific clock data. this is where your actual clock vibes live π₯
π DESCRIPTION π
so clk_hw_register is the primary interface for populating the clock tree with new clock nodes π like, this is how a clock gets into the tree in the first place. main character energy fr fr.
it returns an int β equal to zero means success (slay π
), less than zero means failure (π). and listen, this part is not optional: drivers must test for an error code after calling clk_hw_register. don't just call it and walk away assuming everything's fine, that's giving chaos. check the return value. always. no exceptions. π₯
π¦ SEE ALSO π¦
everything else in the clock cinematic universe, bestie β the kernel file ./drivers/clk/clk.c and:
struct clk_core(9), clk_pm_runtime_get_all(9), clk_pm_runtime_put_all(9), clk_core_get(9), clk_determine_rate_noop(9), clk_rate_exclusive_put(9), clk_rate_exclusive_get(9), clk_unprepare(9), clk_prepare(9), clk_disable(9), clk_gate_restore_context(9), clk_save_context(9), clk_restore_context(9), clk_enable(9), clk_is_enabled_when_prepared(9), clk_hw_init_rate_request(9), clk_hw_forward_rate_request(9), __clk_determine_rate(9), clk_hw_round_rate(9), clk_round_rate(9), __clk_notify(9), __clk_recalc_accuracies(9), clk_get_accuracy(9), __clk_recalc_rates(9), clk_get_rate(9), clk_hw_get_parent_index(9), __clk_speculate_rates(9), clk_set_rate(9), clk_set_rate_exclusive(9), clk_set_rate_range(9), clk_set_min_rate(9), clk_set_max_rate(9), clk_get_parent(9), clk_has_parent(9), clk_set_parent(9), clk_set_phase(9), clk_get_phase(9), clk_set_duty_cycle(9), clk_get_scaled_duty_cycle(9), clk_is_match(9), clk_debug_register(9), clk_debug_init(9), __clk_core_init(9), clk_core_link_consumer(9), clk_core_unlink_consumer(9), alloc_clk(9), free_clk(9), clk_hw_create_clk(9), clk_hw_get_clk(9), dev_or_parent_of_node(9), clk_register(9), clk_unregister(9), clk_hw_unregister(9), devm_clk_register(9), devm_clk_hw_register(9), devm_clk_hw_get_clk(9), clk_notifier_register(9), clk_notifier_unregister(9), struct of_clk_provider(9), of_clk_add_provider(9), of_clk_add_hw_provider(9), devm_of_clk_add_hw_provider(9), of_clk_del_provider(9), of_parse_clkspec(9), of_clk_get_from_provider(9), of_clk_get_by_name(9), of_clk_get_parent_count(9), of_clk_parent_fill(9), of_clk_detect_critical(9), of_clk_init(9)
π go read those. iykyk. your clock tree will thank you.
and that's the whole page bestie π this lil gem lives in ./drivers/clk, dated October 2026, and the man page itself is clk_hw_register(9) β literally iconic of the Kernel API Manual to serve this to us πβ go forth and check your error codes π
π«Ά
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms