cdns_uart_calc_baud_divs(9)

📦 version 7.3.1, in nixpkgs unstable

💫 cdns_uart_calc_baud_divs 💫

okay so we're in the Kernel API Manual bestie, and today's main character is cdns_uart_calc_baud_divs(9) — the little function that does the math so your UART can actually talk at the speed you asked for 🫶

🌸 NAME 🌸

cdns_uart_calc_baud_divs — calculate baud rate divisors, no cap, that's literally the whole job ✨

🎀 SYNOPSIS 🎀

unsigned int cdns_uart_calc_baud_divs (unsigned int clk , unsigned int
baud , u32 *rbdiv , u32 *rcd , int *div8 );

💅 ARGUMENTS 💅

  • clk — the UART module input clock, your starting vibe ⏰
  • baud — the desired baud rate, aka what you want 🔥
  • rbdiv — the BDIV value, and yes it's a return value, it gets filled in for you 💖
  • rcd — the CD value, also a return value, also getting filled in 🎀
  • div8 — the value for the clk_sel bit in mod, return value too, she's the third output bestie 🌸

👑 RETURN 👑

the baud rate 💫 — specifically: the requested baud when it's possible, or the actual baud when there was too much error, or zero if no valid divisors are found 😭 (that last one is the sad ending, we don't speak of it)

🦋 DESCRIPTION 🦋

okay so the formula to obtain the baud rate is right here and it's giving iconic:

baud_tx/rx rate = clk/CD * (BDIV + 1)

and the details, because they matter:

  • input_clk = (Uart User Defined Clock or Apb Clock) — which one it is depends on UCLKEN in the MR Reg 🧚
  • clk = input_clk or input_clk/8 — depends on CLKS in the MR reg ⭐
  • CD and BDIV depend on values in the baud rate generate register and the baud rate clock divisor register 🌈

like. it's just divisors all the way down, and honestly? slay 💅

🍓 SEE ALSO 🍓

the kernel file ./drivers/tty/serial/xilinx_uartps.c, plus the whole friend group:

and that's the page!! 💖✨ brought to you straight outta ./drivers/tty/serial, dated October 2026 — mwah, go divide some clocks bestie 🎀🦋

📦 where this page comes from