cdns3_trb_handled(9)

💅 cdns3_trb_handled(9) — from the Kernel API Manual, bestie

okay so picture this: we're deep in the Kernel API Manual and there's this lil function called cdns3_trb_handled, and honestly? it's giving "did DMA already do its thing or nah" energy. let's get into it 🎀

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✨ NAME ✨

cdns3_trb_handled — check whether trb has been handled by DMA

like literally just a vibe check on your TRB, no cap 🔥

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🌸 SYNOPSIS 🌸

bool cdns3_trb_handled (struct cdns3_endpoint *priv_ep , struct
       cdns3_request *priv_req );

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🦋 ARGUMENTS 🦋

• priv_ep — extended endpoint object. your whole endpoint situation 💖
• priv_req — request object for checking. the request we're side-eyeing 👀

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💜 DESCRIPTION 💜

okay so first thing's first: the endpoint must be selected before invoking this function. literally do not skip that step, bestie, it's not optional 🙈

It returns false if the request has not been handled by DMA, else it returns true. simple as that ✨

now, the abbreviations, because we're about to speak in letters and you need to keep up 💅:

• SR — start ring
• ER — end ring
• DQ = priv_ep->dequeue — dequeue position
• EQ = priv_ep->enqueue — enqueue position
• ST = priv_req->start_trb — index of first TRB in transfer ring
• ET = priv_req->end_trb — index of last TRB in transfer ring
• CI = current_index — index of processed TRB by DMA

As first step, we check if the TRB is between the ST and ET. Then, we check if the cycle bit for index priv_ep->dequeue is correct. one-two punch, we love a two-step 🫶

the rules (yes there are rules, respect them) 📋

1. priv_ep->dequeue never equals to current_index.
2. priv_ep->enqueue never exceed priv_ep->dequeue
3. exception: priv_ep->enqueue == priv_ep->dequeue and priv_ep->free_trbs is zero. This case indicate that TR is full.

⚠️ heads up: that third one is the exception case, and it indicate that the TR is full. write that down bestie 😭

when the request has been handled 👑

At below two cases, the request have been handled.

Case 1 — priv_ep->dequeue < current_index

SR ... EQ ... DQ ... CI ... ER SR ... DQ ... CI ... EQ ... ER

Case 2 — priv_ep->dequeue > current_index

This situation takes place when CI go through the LINK TRB at the end of transfer ring.

SR ... CI ... EQ ... DQ ... ER

and that's the whole tea, no cap ☕💀

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🌈 SEE ALSO 🌈

Kernel file ./drivers/usb/cdns3/cdns3-gadget.c — go read it, iykyk 📖

all the sibling functions, iconic lineup incoming 👑:

• cdns3_clear_register_bit(9)
• cdns3_set_register_bit(9)
• cdns3_ep_addr_to_index(9)
• cdns3_next_request(9)
• cdns3_next_align_buf(9)
• cdns3_next_priv_request(9)
• cdns3_select_ep(9)
• cdns3_get_tdl(9)
• cdns3_allocate_trb_pool(9)
• cdns3_ep_stall_flush(9)
• cdns3_hw_reset_eps_config(9)
• cdns3_ep_inc_trb(9)
• cdns3_ep_inc_enq(9)
• cdns3_ep_inc_deq(9)
• cdns3_allow_enable_l1(9)
• cdns3_start_all_request(9)
• cdns3_wa2_descmiss_copy_data(9)
• cdns3_wa2_descmissing_packet(9)
• cdns3_gadget_giveback(9)
• cdns3_ep_run_transfer(9)
• cdns3_check_ep_interrupt_proceed(9)
• cdns3_check_usb_interrupt_proceed(9)
• cdns3_device_irq_handler(9)
• cdns3_device_thread_irq_handler(9)
• cdns3_ep_onchip_buffer_reserve(9)
• cdns3_ep_config(9)
• cdns3_gadget_ep_alloc_request(9)
• cdns3_gadget_ep_free_request(9)
• cdns3_gadget_ep_enable(9)
• cdns3_gadget_ep_disable(9)
• __cdns3_gadget_ep_queue(9)
• cdns3_gadget_ep_dequeue(9)
• __cdns3_gadget_ep_set_halt(9)
• __cdns3_gadget_ep_clear_halt(9)
• cdns3_gadget_ep_set_halt(9)
• cdns3_gadget_get_frame(9)
• cdns3_gadget_udc_start(9)
• cdns3_gadget_udc_stop(9)
• cdns3_gadget_check_config(9)
• cdns3_init_eps(9)
• cdns3_gadget_init(9)

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and that's a wrap bestie 🍓 this page lives at ./drivers/usb/cdns3, dated October 2026, and the whole thing answers to the name cdns3_trb_handled(9). go handle some TRBs, you got this 💖✨🧚