BUFFER OBJECT TILING(9)

🎀 buffer object tiling 🎀

okay bestie, welcome to the Kernel API Manual page for buffer object tiling — this is the whole vibe around how userspace declares fence register requirements. The userspace interface for that is i915_gem_set_tiling_ioctl and i915_gem_get_tiling_ioctl. 💅

In principle, GEM literally does not care at all about the internal data layout of an object, so it also doesn't care about tiling or swizzling. There are two exceptions, and yes they matter:

• For X and Y tiling, the hardware provides detilers for CPU access — the so-called fences. Since there's only a limited amount of them, the kernel must manage these, and therefore userspace must tell the kernel the object tiling if it wants to use fences for detiling. 🧚
• On gen3 and gen4 platforms, there's a swizzling pattern for tiled objects which depends upon the physical page frame number. When swapping such objects, the page frame number might change, and the kernel must be able to fix this up and hence now the tiling. Note that on a subset of platforms with asymmetric memory channel population, the swizzling pattern changes in an unknown way, and for those the kernel simply forbids swapping completely. 😭💀

Since neither of this applies for new tiling layouts on modern platforms like W, Ys and Yf tiling, GEM only allows object tiling to be set to X or Y tiled. Anything else can be handled in userspace entirely without the kernel's involvement. Periodt. ✨

🌈 SEE ALSO 🌈

• Kernel file ./drivers/gpu/drm/i915/gem/i915_gem_tiling.c
• i915_gem_fence_size(9), i915_gem_fence_alignment(9), i915_gem_set_tiling_ioctl(9), i915_gem_get_tiling_ioctl(9)

Cute sign-off: this page comes from the source tree at ./drivers/gpu/drm/i915/gem, version/date October 2026, and it's buffer object tiling(9). Slay, bye. 💖🦋